Lines Matching refs:MBBI
171 MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
189 MachineBasicBlock::iterator &MBBI);
484 MachineBasicBlock::iterator MBBI,
492 for (; MBBI != MBB.end(); ++MBBI) {
494 unsigned Opc = MBBI->getOpcode();
496 if (MBBI->readsRegister(Base)) {
509 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3);
514 Register InstrSrcReg = getLoadStoreRegOp(*MBBI).getReg();
521 !definesCPSR(*MBBI)) {
526 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3);
543 } else if (definesCPSR(*MBBI) || MBBI->isCall() || MBBI->isBranch()) {
552 BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBi8), Base)
561 if (MBBI->killsRegister(Base) || MBBI->definesRegister(Base))
572 if (MBBI != MBB.end()) --MBBI;
573 BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBi8), Base)
1218 /// Searches for an increment or decrement of \p Reg before \p MBBI.
1220 findIncDecBefore(MachineBasicBlock::iterator MBBI, Register Reg,
1223 MachineBasicBlock &MBB = *MBBI->getParent();
1226 if (MBBI == BeginMBBI)
1230 MachineBasicBlock::iterator PrevMBBI = std::prev(MBBI);
1238 /// Searches for a increment or decrement of \p Reg after \p MBBI.
1240 findIncDecAfter(MachineBasicBlock::iterator MBBI, Register Reg,
1243 MachineBasicBlock &MBB = *MBBI->getParent();
1245 MachineBasicBlock::iterator NextMBBI = std::next(MBBI);
1288 MachineBasicBlock::iterator MBBI(MI);
1291 = findIncDecBefore(MBBI, Base, Pred, PredReg, Offset);
1298 MergeInstr = findIncDecAfter(MBBI, Base, Pred, PredReg, Offset);
1326 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc))
1338 MBB.erase(MBBI);
1453 MachineBasicBlock::iterator MBBI(MI);
1456 = findIncDecBefore(MBBI, Base, Pred, PredReg, Offset);
1463 MergeInstr = findIncDecAfter(MBBI, Base, Pred, PredReg, Offset);
1482 BuildMI(MBB, MBBI, DL, TII->get(NewOpc))
1493 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1499 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1509 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1524 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)
1533 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)
1541 MBB.erase(MBBI);
1564 MachineBasicBlock::iterator MBBI(MI);
1567 MachineBasicBlock::iterator MergeInstr = findIncDecBefore(MBBI, Base, Pred,
1573 MergeInstr = findIncDecAfter(MBBI, Base, Pred, PredReg, Offset);
1582 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc));
1600 MBB.erase(MBBI);
1662 MachineBasicBlock::iterator &MBBI, int Offset,
1669 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(),
1678 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(),
1690 MachineBasicBlock::iterator &MBBI) {
1691 MachineInstr *MI = &*MBBI;
1739 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1747 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1771 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill,
1773 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1787 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1790 InsertLDR_STR(MBB, MBBI, OffImm + 4, isLd, NewOpc2, OddReg, OddDeadKill,
1800 MBBI = MBB.erase(MBBI);
1816 for (MachineBasicBlock::iterator I = MBB.end(), MBBI; I != MBB.begin();
1817 I = MBBI) {
1819 MBBI = std::prev(I);
1820 if (FixInvalidRegPairOp(MBB, MBBI))
1824 if (isMemoryOp(*MBBI)) {
1825 unsigned Opcode = MBBI->getOpcode();
1826 const MachineOperand &MO = MBBI->getOperand(0);
1828 Register Base = getLoadStoreBaseOp(*MBBI).getReg();
1830 ARMCC::CondCodes Pred = getInstrPredicate(*MBBI, PredReg);
1831 int Offset = getMemoryOpOffset(*MBBI);
1837 MemOps.push_back(MemOpQueueEntry(*MBBI, Offset, Position));
1865 MemOps.push_back(MemOpQueueEntry(*MBBI, Offset, Position));
1881 MemOps.insert(MI, MemOpQueueEntry(*MBBI, Offset, Position));
1889 MBBI = I;
1892 } else if (MBBI->isDebugInstr()) {
1894 } else if (MBBI->getOpcode() == ARM::t2LDRDi8 ||
1895 MBBI->getOpcode() == ARM::t2STRDi8) {
1898 MergeBaseCandidates.push_back(&*MBBI);
1970 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
1971 if (MBBI != MBB.begin() && MBBI != MBB.end() &&
1972 (MBBI->getOpcode() == ARM::BX_RET ||
1973 MBBI->getOpcode() == ARM::tBX_RET ||
1974 MBBI->getOpcode() == ARM::MOVPCLR)) {
1975 MachineBasicBlock::iterator PrevI = std::prev(MBBI);
1992 PrevMI.copyImplicitOps(*MBB.getParent(), *MBBI);
1993 MBB.erase(MBBI);
2012 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
2013 if (MBBI == MBB.begin() || MBBI == MBB.end() ||
2014 MBBI->getOpcode() != ARM::tBX_RET)
2017 MachineBasicBlock::iterator Prev = MBBI;
2025 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(ARM::tBX))
2028 .copyImplicitOps(*MBBI);
2029 MBB.erase(MBBI);
2439 MachineBasicBlock::iterator MBBI = MBB->begin();
2441 while (MBBI != E) {
2442 for (; MBBI != E; ++MBBI) {
2443 MachineInstr &MI = *MBBI;
2446 ++MBBI;
2510 if (MBBI != E) {