Lines Matching defs:NewOpc
1325 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode);
1326 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc))
1457 unsigned NewOpc;
1459 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::add);
1461 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::sub);
1465 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::add);
1467 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::sub);
1482 BuildMI(MBB, MBBI, DL, TII->get(NewOpc))
1492 if (NewOpc == ARM::LDR_PRE_IMM || NewOpc == ARM::LDRB_PRE_IMM) {
1493 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1499 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1509 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())
1521 if (isAM2 && NewOpc == ARM::STR_POST_IMM) {
1524 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)
1533 BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)
1569 unsigned NewOpc;
1571 NewOpc = Opcode == ARM::t2LDRDi8 ? ARM::t2LDRD_PRE : ARM::t2STRD_PRE;
1575 NewOpc = Opcode == ARM::t2LDRDi8 ? ARM::t2LDRD_POST : ARM::t2STRD_POST;
1582 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc));
1583 if (NewOpc == ARM::t2LDRD_PRE || NewOpc == ARM::t2LDRD_POST) {
1586 assert(NewOpc == ARM::t2STRD_PRE || NewOpc == ARM::t2STRD_POST);
1592 TII->get(NewOpc).getNumOperands() == 7 &&
1663 bool isDef, unsigned NewOpc, unsigned Reg,
1670 TII->get(NewOpc))
1679 TII->get(NewOpc))
1735 unsigned NewOpc = (isLd)
1739 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1747 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1759 unsigned NewOpc = (isLd)
1773 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1787 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill,
1987 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET);
1990 PrevMI.setDesc(TII->get(NewOpc));
2103 unsigned &NewOpc, Register &EvenReg, Register &OddReg,
2188 MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc,
2199 NewOpc = ARM::LDRD;
2201 NewOpc = ARM::STRD;
2203 NewOpc = ARM::t2LDRDi8;
2207 NewOpc = ARM::t2STRDi8;
2356 unsigned NewOpc = 0;
2359 if (NumMove == 2 && CanFormLdStDWord(Op0, Op1, dl, NewOpc,
2365 const MCInstrDesc &MCID = TII->get(NewOpc);