Lines Matching defs:MIB
47 bool selectCmp(CmpConstants Helper, MachineInstrBuilder &MIB,
60 bool selectGlobal(MachineInstrBuilder &MIB, MachineRegisterInfo &MRI) const;
61 bool selectSelect(MachineInstrBuilder &MIB, MachineRegisterInfo &MRI) const;
62 bool selectShift(unsigned ShiftOpc, MachineInstrBuilder &MIB) const;
233 static bool selectMergeValues(MachineInstrBuilder &MIB,
242 Register VReg0 = MIB.getReg(0);
247 Register VReg1 = MIB.getReg(1);
252 Register VReg2 = MIB.getReg(2);
258 MIB->setDesc(TII.get(ARM::VMOVDRR));
259 MIB.add(predOps(ARMCC::AL));
264 static bool selectUnmergeValues(MachineInstrBuilder &MIB,
274 Register VReg0 = MIB.getReg(0);
279 Register VReg1 = MIB.getReg(1);
284 Register VReg2 = MIB.getReg(2);
290 MIB->setDesc(TII.get(ARM::VMOVRRD));
291 MIB.add(predOps(ARMCC::AL));
485 InsertInfo(MachineInstrBuilder &MIB)
486 : MBB(*MIB->getParent()), InsertBefore(std::next(MIB->getIterator())),
487 DbgLoc(MIB->getDebugLoc()) {}
529 MachineInstrBuilder &MIB,
531 const InsertInfo I(MIB);
533 auto ResReg = MIB.getReg(0);
538 static_cast<CmpInst::Predicate>(MIB->getOperand(1).getPredicate());
541 MIB->eraseFromParent();
545 auto LHSReg = MIB.getReg(2);
546 auto RHSReg = MIB.getReg(3);
571 MIB->eraseFromParent();
611 bool ARMInstructionSelector::selectGlobal(MachineInstrBuilder &MIB,
618 auto GV = MIB->getOperand(1).getGlobal();
624 auto &MBB = *MIB->getParent();
633 Size](MachineInstrBuilder &MIB,
635 assert((MIB->getOpcode() == ARM::LDRi12 ||
636 MIB->getOpcode() == ARM::t2LDRpci) &&
646 MIB.addConstantPoolIndex(CPIndex, /*Offset*/ 0, /*TargetFlags*/ 0)
650 if (MIB->getOpcode() == ARM::LDRi12)
651 MIB.addImm(0);
652 MIB.add(predOps(ARMCC::AL));
655 auto addGOTMemOperand = [this, &MF, Alignment](MachineInstrBuilder &MIB) {
656 MIB.addMemOperand(MF.getMachineMemOperand(
679 MIB->setDesc(TII.get(Opc));
686 MIB->getOperand(1).setTargetFlags(TargetFlags);
690 auto ResultReg = MIB.getReg(0);
693 MIB->getOperand(0).setReg(AddressReg);
695 auto InsertBefore = std::next(MIB->getIterator());
696 auto MIBLoad = BuildMI(MBB, InsertBefore, MIB->getDebugLoc(),
707 addGOTMemOperand(MIB);
711 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
717 MIB->setDesc(TII.get(Opc));
718 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
724 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(),
729 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(),
737 MIB->setDesc(TII.get(Opcodes.ADDrr));
738 MIB->RemoveOperand(1);
739 MIB.addReg(ARM::R9) // FIXME: don't hardcode R9
744 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
749 MIB->setDesc(TII.get(Opcodes.MOVi32imm));
752 MIB->setDesc(TII.get(Opcodes.ConstPoolLoad));
753 MIB->RemoveOperand(1);
754 addOpsForConstantPoolLoad(MIB, GV, /*IsSBREL*/ false);
758 MIB->setDesc(TII.get(Opcodes.MOVi32imm));
760 MIB->setDesc(TII.get(Opcodes.LDRLIT_ga_abs));
766 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
769 bool ARMInstructionSelector::selectSelect(MachineInstrBuilder &MIB,
771 auto &MBB = *MIB->getParent();
772 auto InsertBefore = std::next(MIB->getIterator());
773 auto &DbgLoc = MIB->getDebugLoc();
776 auto CondReg = MIB.getReg(1);
788 auto ResReg = MIB.getReg(0);
789 auto TrueReg = MIB.getReg(2);
790 auto FalseReg = MIB.getReg(3);
802 MIB->eraseFromParent();
807 MachineInstrBuilder &MIB) const {
809 MIB->setDesc(TII.get(ARM::MOVsr));
810 MIB.addImm(ShiftOpc);
811 MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
812 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
860 MachineInstrBuilder MIB{MF, I};
877 MIB.addImm(1).add(predOps(ARMCC::AL)).add(condCodeOp());
905 MIB.addImm(0).add(predOps(ARMCC::AL));
945 MIB->eraseFromParent();
987 MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
1001 MIB->setDesc(TII.get(LoadOpcode));
1002 MIB->RemoveOperand(1);
1003 MIB.addConstantPoolIndex(CPIndex, /*Offset*/ 0, /*TargetFlags*/ 0)
1036 return selectSelect(MIB, MRI);
1040 return selectCmp(Helper, MIB, MRI);
1059 return selectCmp(Helper, MIB, MRI);
1062 return selectShift(ARM_AM::ShiftOpc::lsr, MIB);
1064 return selectShift(ARM_AM::ShiftOpc::asr, MIB);
1066 return selectShift(ARM_AM::ShiftOpc::lsl, MIB);
1070 MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
1076 MIB.addImm(0).add(predOps(ARMCC::AL)).add(condCodeOp());
1079 return selectGlobal(MIB, MRI);
1123 MIB.addReg(0);
1124 MIB.addImm(0).add(predOps(ARMCC::AL));
1128 if (!selectMergeValues(MIB, TII, MRI, TRI, RBI))
1133 if (!selectUnmergeValues(MIB, TII, MRI, TRI, RBI))