Lines Matching refs:SrcVT
5753 EVT SrcVT = Tmp1.getValueType();
5770 if (SrcVT == MVT::f32) {
5804 if (SrcVT == MVT::f64)
5967 EVT SrcVT = Op.getValueType();
5970 if ((SrcVT == MVT::i16 || SrcVT == MVT::i32) &&
5976 (SrcVT == MVT::f16 || SrcVT == MVT::bf16))
5979 MoveFromHPR(SDLoc(N), DAG, MVT::i32, SrcVT.getSimpleVT(), Op));
5981 if (!(SrcVT == MVT::i64 || DstVT == MVT::i64))
5985 if (SrcVT == MVT::i64 && TLI.isTypeLegal(DstVT)) {
6000 if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
6002 if (DAG.getDataLayout().isBigEndian() && SrcVT.isVector() &&
6003 SrcVT.getVectorNumElements() > 1)
6006 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op));
7769 EVT SrcVT = Src.ShuffleVec.getValueType();
7771 if (SrcVT.getSizeInBits() == VT.getSizeInBits())
7776 EVT EltVT = SrcVT.getVectorElementType();
7780 if (SrcVT.getSizeInBits() < VT.getSizeInBits()) {
7781 if (2 * SrcVT.getSizeInBits() != VT.getSizeInBits())
7791 if (SrcVT.getSizeInBits() != 2 * VT.getSizeInBits())
15895 EVT SrcVT = Src.getValueType();
15896 if (SrcVT.getScalarSizeInBits() == DstVT.getScalarSizeInBits())
15907 EVT SrcVT = Src.getValueType();
15911 SrcVT.getScalarSizeInBits() <= DstVT.getScalarSizeInBits() &&
16213 bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
16214 if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
16217 unsigned SrcBits = SrcVT.getSizeInBits();
17829 MVT SrcVT = (Sz == 16 ? MVT::f16 : MVT::f32);
17840 LC = RTLIB::getFPEXT(SrcVT, DstVT);
17855 EVT SrcVT = SrcVal.getValueType();
17858 const unsigned SrcSz = SrcVT.getSizeInBits();
17873 RTLIB::Libcall LC = RTLIB::getFPROUND(SrcVT, DstVT);
18131 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,