Lines Matching defs:Res
3218 SDValue Res;
3242 Res =
3245 Res = DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlign());
3246 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res);
5567 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops);
5570 SDValue Ops[] = { Res, Dest, ARMcc, CCR, Res.getValue(1) };
5571 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops);
5573 return Res;
5789 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT,
5793 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res);
5794 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res,
5797 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res);
5800 return Res;
6206 SDValue Res = DAG.getBitcast(VT8Bit, N->getOperand(0));
6207 Res = DAG.getNode(ISD::CTPOP, DL, VT8Bit, Res);
6216 Ops.push_back(Res);
6221 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops);
6224 return Res;
8369 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT),
8371 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0),
8372 Res.getValue(1));
9558 SDValue Res;
9571 Res = DAG.getNode(BaseOpcode, dl, EltVT, Res0, Res1, Op->getFlags());
9577 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags());
9582 Res = DAG.getNode(ISD::ANY_EXTEND, dl, Op->getValueType(0), Res);
9583 return Res;
9862 SDValue Res;
9870 Res = ExpandBITCAST(N, DAG, Subtarget);
9875 Res = Expand64BitShift(N, DAG, Subtarget);
9879 Res = LowerREM(N, DAG);
9883 Res = LowerDivRem(SDValue(N, 0), DAG);
9884 assert(Res.getNumOperands() == 2 && "DivRem needs two values");
9885 Results.push_back(Res.getValue(0));
9886 Results.push_back(Res.getValue(1));
9890 Res = LowerSADDSUBSAT(SDValue(N, 0), DAG, Subtarget);
9912 if (Res.getNode())
9913 Results.push_back(Res);
12415 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1));
12419 LLVM_DEBUG(dbgs() << "Into:\n"; X.dump(); BinOp.dump(); Res.dump());
12420 return Res;
12626 SDValue Res;
12632 Res = DAG.getNode(ISD::ADD, DL, VT,
12640 Res = DAG.getNode(ISD::SUB, DL, VT,
12652 Res = DAG.getNode(ISD::SUB, DL, VT,
12660 Res = DAG.getNode(ISD::ADD, DL, VT,
12666 Res = DAG.getNode(ISD::SUB, DL, VT,
12667 DAG.getConstant(0, DL, MVT::i32), Res);
12673 Res = DAG.getNode(ISD::SHL, DL, VT,
12674 Res, DAG.getConstant(ShiftAmt, DL, MVT::i32));
12677 DCI.CombineTo(N, Res, false);
12890 SDValue Res = DAG.getNode(Opcode, dl, MVT::i32, OpS32, OpS16);
12891 DAG.ReplaceAllUsesOfValueWith(SDValue(OR, 0), Res);
12932 SDValue Res;
12943 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00,
12947 DCI.CombineTo(N, Res, false);
12970 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0),
12972 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res,
12974 DCI.CombineTo(N, Res, false);
12987 Res = DAG.getNode(ISD::SRL, DL, VT, N00,
12989 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res,
12991 DCI.CombineTo(N, Res, false);
13009 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0),
13012 DCI.CombineTo(N, Res, false);
13169 if (SDValue Res = PerformORCombineToBFI(N, DCI, Subtarget))
13170 return Res;
15630 SDValue Res;
15634 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops);
15641 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops);
15644 return Res;
15752 SDValue Res;
15754 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc,
15759 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc,
15789 Res = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::CTLZ, dl, VT, Sub),
15809 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry);
15819 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, TrueVal, ARMcc,
15833 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, FalseVal,
15864 Res = DAG.getNode(ISD::SUBCARRY, dl, VTs, FalseVal, Subc, Subc.getValue(1));
15867 Res = DAG.getNode(ISD::SHL, dl, VT, Res,
15871 if (Res.getNode()) {
15875 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res,
15878 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res,
15881 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res,
15885 return Res;