Lines Matching refs:Imm
75 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) {
76 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
167 inline bool is_so_imm(unsigned Imm) const {
168 return ARM_AM::getSOImmVal(Imm) != -1;
171 inline bool is_so_imm_not(unsigned Imm) const {
172 return ARM_AM::getSOImmVal(~Imm) != -1;
175 inline bool is_t2_so_imm(unsigned Imm) const {
176 return ARM_AM::getT2SOImmVal(Imm) != -1;
179 inline bool is_t2_so_imm_not(unsigned Imm) const {
180 return ARM_AM::getT2SOImmVal(~Imm) != -1;
347 /// operand. If so Imm will receive the 32-bit value.
348 static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
350 Imm = cast<ConstantSDNode>(N)->getZExtValue();
357 // If so Imm will receive the 32 bit value.
358 static bool isInt32Immediate(SDValue N, unsigned &Imm) {
359 return isInt32Immediate(N.getNode(), Imm);
364 // If so Imm will receive the 32 bit value.
365 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
367 isInt32Immediate(N->getOperand(1).getNode(), Imm);
2855 SDValue Imm = N->getOperand(OpIdx);
2856 uint32_t ImmVal = cast<ConstantSDNode>(Imm)->getZExtValue();
3268 auto EmitShift = [&](unsigned Opc, SDValue Src, unsigned Imm) -> SDNode* {
3271 SDValue Ops[] = { Src, CurDAG->getTargetConstant(Imm, dl, MVT::i32),
3277 CurDAG->getTargetConstant(Imm, dl, MVT::i32),
3511 uint32_t Imm = (uint32_t) N1C->getZExtValue();
3518 Subtarget->hasThumb2() && (is_t2_so_imm(Imm) || is_t2_so_imm_not(Imm));
3520 ConstantMaterializationCost(Imm, Subtarget) >
3521 ConstantMaterializationCost(~Imm, Subtarget)) {