Lines Matching refs:MBBI
146 bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
151 emitARMRegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes,
154 emitT2RegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes,
159 MachineBasicBlock::iterator &MBBI, const DebugLoc &dl,
164 emitRegPlusImmediate(isARM, MBB, MBBI, dl, TII, ARM::SP, ARM::SP, NumBytes,
261 MachineBasicBlock::iterator MBBI,
282 BuildMI(MBB, MBBI, DL, TII.get(ARM::BFC), Reg)
287 BuildMI(MBB, MBBI, DL, TII.get(ARM::BICri), Reg)
297 BuildMI(MBB, MBBI, DL, TII.get(ARM::MOVsi), Reg)
302 BuildMI(MBB, MBBI, DL, TII.get(ARM::MOVsi), Reg)
312 BuildMI(MBB, MBBI, DL, TII.get(ARM::t2BFC), Reg)
338 MachineBasicBlock::iterator MBBI = MBB.begin();
378 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -ArgRegsSaveSize,
380 DefCFAOffsetCandidates.addInst(std::prev(MBBI), ArgRegsSaveSize, true);
386 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -(NumBytes - ArgRegsSaveSize),
388 DefCFAOffsetCandidates.addInst(std::prev(MBBI),
438 LastPush = MBBI++;
444 GPRCS1Push = LastPush = MBBI++;
473 GPRCS2Push = LastPush = MBBI++;
485 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -DPRGapSize,
487 DefCFAOffsetCandidates.addInst(std::prev(MBBI), DPRGapSize);
495 while (MBBI != MBB.end() && MBBI->getOpcode() == ARM::VSTMDDB_UPD) {
496 DefCFAOffsetCandidates.addInst(MBBI, sizeOfSPAdjustment(*MBBI));
497 LastPush = MBBI++;
503 MBBI = skipAlignedDPRCS2Spills(MBBI, AFI->getNumAlignedDPRCS2Regs());
516 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4)
521 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R4)
531 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBL))
538 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R12)
542 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBLXr))
550 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), ARM::SP)
565 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
567 DefCFAOffsetCandidates.addInst(std::prev(MBBI), NumBytes);
718 emitAligningInstructions(MF, AFI, TII, MBB, MBBI, dl, ARM::SP, MaxAlign,
728 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
731 emitAligningInstructions(MF, AFI, TII, MBB, MBBI, dl, ARM::R4, MaxAlign,
733 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
748 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), RegInfo->getBaseRegister())
753 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), RegInfo->getBaseRegister())
786 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
787 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
791 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes - ArgRegsSaveSize,
794 // Unwind MBBI to point to first LDR / VLDRD.
795 if (MBBI != MBB.begin()) {
797 --MBBI;
798 } while (MBBI != MBB.begin() &&
799 MBBI->getFlag(MachineInstr::FrameDestroy));
800 if (!MBBI->getFlag(MachineInstr::FrameDestroy))
801 ++MBBI;
818 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes,
831 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
833 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
841 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), ARM::SP)
847 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
853 !tryFoldSPUpdateIntoPushPop(STI, MF, &*MBBI, NumBytes))
854 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes,
858 if (MBBI != MBB.end() && AFI->getDPRCalleeSavedAreaSize()) {
859 MBBI++;
862 while (MBBI != MBB.end() && MBBI->getOpcode() == ARM::VLDMDIA_UPD)
863 MBBI++;
868 emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getDPRCalleeSavedGapSize(),
872 if (AFI->getGPRCalleeSavedArea2Size()) MBBI++;
873 if (AFI->getGPRCalleeSavedArea1Size()) MBBI++;
874 if (AFI->getFPCXTSaveAreaSize()) MBBI++;
878 emitSPUpdate(isARM, MBB, MBBI, dl, TII, ArgRegsSaveSize,