Lines Matching defs:MIB
238 const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
240 const MachineInstrBuilder &MIB,
283 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
284 MachineInstr *MI = &*MIB;
290 MIB.add(predOps(ARMCC::AL));
296 MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
297 return MIB;
578 MachineInstrBuilder MIB;
581 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
584 MIB.addImm(Id);
585 AddOptionalDefs(MIB);
589 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
593 AddOptionalDefs(MIB);
599 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
603 AddOptionalDefs(MIB);
610 MachineInstrBuilder MIB;
613 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
618 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
623 AddOptionalDefs(MIB);
858 const MachineInstrBuilder &MIB,
874 MIB.addFrameIndex(FI);
880 MIB.addReg(0);
881 MIB.addImm(Imm);
883 MIB.addImm(Addr.Offset);
885 MIB.addMemOperand(MMO);
888 MIB.addReg(Addr.Base.Reg);
894 MIB.addReg(0);
895 MIB.addImm(Imm);
897 MIB.addImm(Addr.Offset);
900 AddOptionalDefs(MIB);
990 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
992 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOLoad, useAM3);
1128 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
1131 AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOStore, useAM3);
1438 MachineInstrBuilder MIB;
1439 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
1444 MIB.addImm(Imm);
1445 AddOptionalDefs(MIB);
2166 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2168 AddOptionalDefs(MIB);
2170 MIB.addReg(R, RegState::Implicit);
2262 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2266 MIB.add(predOps(ARMCC::AL));
2268 MIB.addReg(CalleeReg);
2270 MIB.addExternalSymbol(TLI.getLibcallName(Call));
2274 MIB.addReg(R, RegState::Implicit);
2278 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2285 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2401 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
2406 MIB.add(predOps(ARMCC::AL));
2408 MIB.addReg(CalleeReg);
2410 MIB.addGlobalAddress(GV, 0, 0);
2412 MIB.addExternalSymbol(IntrMemName, 0);
2416 MIB.addReg(R, RegState::Implicit);
2420 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2428 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI);
2720 MachineInstrBuilder MIB = BuildMI(
2723 MIB.addReg(ARM::CPSR, RegState::Define);
2725 MIB.addReg(SrcReg, isKill * RegState::Kill)
2729 MIB.add(condCodeOp());
2801 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2806 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm));
2808 MIB.addReg(Reg2);
2809 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0));
2812 AddOptionalDefs(MIB);
2967 MachineInstrBuilder MIB =
2972 MIB.addImm(0);
2973 MIB.add(predOps(ARMCC::AL));
2980 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), DestReg)
2985 MIB.add(predOps(ARMCC::AL));
2989 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
2994 AddOptionalDefs(MIB);