Lines Matching refs:SDWAInst
762 MachineInstr *SDWAInst = OrSDWADef->getParent();
765 // Check that OtherInstr is actually bitwise compatible with SDWAInst = their
769 // SDWAInst | OtherInst bitness / OtherInst dst_sel
778 // E.g. if SDWAInst is v_add_f16_sdwa dst_sel:WORD_1 then v_add_f16 is OK
789 TII->getNamedImmOperand(*SDWAInst, AMDGPU::OpName::dst_sel));;
1018 MachineInstrBuilder SDWAInst =
1026 SDWAInst.add(*Dst);
1030 SDWAInst.add(*Dst);
1033 SDWAInst.addReg(TRI->getVCC(), RegState::Define);
1044 SDWAInst.addImm(Mod->getImm());
1046 SDWAInst.addImm(0);
1047 SDWAInst.add(*Src0);
1056 SDWAInst.addImm(Mod->getImm());
1058 SDWAInst.addImm(0);
1059 SDWAInst.add(*Src1);
1069 SDWAInst.add(*Src2);
1076 SDWAInst.add(*Clamp);
1078 SDWAInst.addImm(0);
1085 SDWAInst.add(*OMod);
1087 SDWAInst.addImm(0);
1095 SDWAInst.add(*DstSel);
1097 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1105 SDWAInst.add(*DstUnused);
1107 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD);
1115 SDWAInst.add(*Src0Sel);
1117 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1125 SDWAInst.add(*Src1Sel);
1127 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1146 SDWAInst.add(Tied);
1147 SDWAInst->tieOperands(PreserveDstIdx, SDWAInst->getNumOperands() - 1);
1153 LLVM_DEBUG(dbgs() << *SDWAInst << "\nOperand: " << *Operand);
1165 Converted |= Operand->convertToSDWA(*SDWAInst, TII);
1168 ConvertedInstructions.push_back(SDWAInst);
1170 SDWAInst->eraseFromParent();
1174 LLVM_DEBUG(dbgs() << "\nInto:" << *SDWAInst << '\n');