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  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/

Lines Matching refs:SDWA

1 //===- SIPeepholeSDWA.cpp - Peephole optimization for SDWA instructions ---===//
9 /// \file This pass tries to apply several peephole SDWA patterns.
59 STATISTIC(NumSDWAPatternsFound, "Number of SDWA patterns found.");
61 "Number of instruction converted to SDWA.");
99 StringRef getPassName() const override { return "SI Peephole SDWA"; }
138 using namespace AMDGPU::SDWA;
213 INITIALIZE_PASS(SIPeepholeSDWA, DEBUG_TYPE, "SI Peephole SDWA", false, false)
249 OS << "SDWA src: " << *getTargetOperand()
257 OS << "SDWA dst: " << *getTargetOperand()
264 OS << "SDWA preserve dst: " << *getTargetOperand()
356 // For SDWA src operand potential instruction is one that use register
393 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) {
400 if (DstSel == AMDGPU::SDWA::SdwaSel::WORD_1 &&
401 getSrcSel() == AMDGPU::SDWA::SdwaSel::WORD_0) {
440 // For SDWA dst operand potential instruction is one that defines register
465 getDstSel() != AMDGPU::SDWA::DWORD) {
556 // to SDWA src:v0 src_sel:WORD_1/BYTE_3
559 // to SDWA src:v0 src_sel:WORD_1/BYTE_3 sext:1
562 // to SDWA dst:v1 dst_sel:WORD_1/BYTE_3 dst_unused:UNUSED_PAD
597 // to SDWA src:v0 src_sel:BYTE_1
600 // to SDWA src:v0 src_sel:BYTE_1 sext:1
603 // to SDWA dst:v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD
632 // to SDWA src:v0 src_sel:BYTE_1
688 // to SDWA src:v0 src_sel:WORD_0/BYTE_0
721 // to SDWA preserve dst:v4 dst_sel:WORD_1 dst_unused:UNUSED_PRESERVE preserve:v3
723 // Check if one of operands of v_or_b32 is SDWA instruction
767 // regular instruction with compatible bitness or SDWA instruction with
781 // TODO: add support for non-SDWA instructions as OtherInst.
782 // For now this only works with SDWA instructions. For regular instructions
948 // Check if this is already an SDWA instruction
953 // Check if this instruction has opcode that supports SDWA
987 // Check if target supports this SDWA opcode
991 // FIXME: has SDWA but require handling of implicit VCC use
1017 // Create SDWA version of instruction MI and initialize its operands
1022 // Copy dst, if it is present in original then should also be present in SDWA
1097 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1107 SDWAInst.addImm(AMDGPU::SDWA::DstUnused::UNUSED_PAD);
1117 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1127 SDWAInst.addImm(AMDGPU::SDWA::SdwaSel::DWORD);
1134 DstUnused->getImm() == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) {
1135 // We expect, if we are here, that the instruction was already in it's SDWA form,
1154 // There should be no intesection between SDWA operands and potential MIs
1181 // If an instruction was converted to SDWA it should not have immediates or SGPR
1224 // Find all SDWA operands in MF.
1229 // Preprocess the ADD/SUB pairs so they could be SDWA'ed.