Lines Matching defs:SU
197 void SIScheduleBlock::addUnit(SUnit *SU) {
198 NodeNum2Index[SU->NodeNum] = SUnits.size();
199 SUnits.push_back(SU);
205 dbgs() << " SU(" << Cand.SU->NodeNum << ") " << getReasonStr(Cand.Reason);
257 if (TryCand.SU->NodeNum < Cand.SU->NodeNum) {
265 for (SUnit* SU : TopReadySUs) {
270 TryCand.SU = SU;
271 TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure);
274 TryCand.IsLowLatency = DAG->IsLowLatencySU[SU->NodeNum];
275 TryCand.LowLatencyOffset = DAG->LowLatencyOffset[SU->NodeNum];
277 HasLowLatencyNonWaitedParent[NodeNum2Index[SU->NodeNum]];
283 return TopCand.SU;
293 for (SUnit* SU : SUnits) {
294 if (!SU->NumPredsLeft)
295 TopReadySUs.push_back(SU);
299 SUnit *SU = TopReadySUs[0];
300 ScheduledSUnits.push_back(SU);
301 nodeScheduled(SU);
335 // Goes though all SU. RPTracker captures what had to be alive for the SUs
337 for (SUnit* SU : ScheduledSUnits) {
338 RPTracker.setPos(SU->getInstr());
411 for (SUnit* SU : SUnits) {
412 if (!SU->NumPredsLeft)
413 TopReadySUs.push_back(SU);
417 SUnit *SU = pickNode();
418 ScheduledSUnits.push_back(SU);
419 TopRPTracker.setPos(SU->getInstr());
421 nodeScheduled(SU);
431 for (SUnit* SU : SUnits) {
432 assert(SU->isScheduled &&
433 SU->NumPredsLeft == 0);
441 for (SUnit* SU : SUnits) {
442 SU->isScheduled = false;
443 for (SDep& Succ : SU->Succs) {
445 undoReleaseSucc(SU, &Succ);
453 void SIScheduleBlock::undoReleaseSucc(SUnit *SU, SDep *SuccEdge) {
463 void SIScheduleBlock::releaseSucc(SUnit *SU, SDep *SuccEdge) {
482 /// Release Successors of the SU that are in the block or not.
483 void SIScheduleBlock::releaseSuccessors(SUnit *SU, bool InOrOutBlock) {
484 for (SDep& Succ : SU->Succs) {
493 releaseSucc(SU, &Succ);
499 void SIScheduleBlock::nodeScheduled(SUnit *SU) {
501 assert (!SU->NumPredsLeft);
502 std::vector<SUnit *>::iterator I = llvm::find(TopReadySUs, SU);
509 releaseSuccessors(SU, true);
512 if (HasLowLatencyNonWaitedParent[NodeNum2Index[SU->NodeNum]])
515 if (DAG->IsLowLatencySU[SU->NodeNum]) {
516 for (SDep& Succ : SU->Succs) {
523 SU->isScheduled = true;
528 for (SUnit* SU : SUnits) {
529 releaseSuccessors(SU, false);
530 if (DAG->IsHighLatencySU[SU->NodeNum])
614 for (const SUnit* SU : SUnits)
615 DAG->dumpNode(*SU);
646 bool SIScheduleBlockCreator::isSUInBlock(SUnit *SU, unsigned ID) {
647 if (SU->NodeNum >= DAG->SUnits.size())
649 return CurrentBlocks[Node2CurrentBlock[SU->NodeNum]]->getID() == ID;
656 SUnit *SU = &DAG->SUnits[i];
657 if (DAG->IsHighLatencySU[SU->NodeNum]) {
658 CurrentColoring[SU->NodeNum] = NextReservedID++;
664 hasDataDependencyPred(const SUnit &SU, const SUnit &FromSU) {
665 for (const auto &PredDep : SU.Preds) {
682 SUnit *SU = &DAG->SUnits[i];
683 if (DAG->IsHighLatencySU[SU->NodeNum])
698 const SUnit &SU = DAG->SUnits[SUNum];
699 if (DAG->IsHighLatencySU[SU.NodeNum]) {
717 // By construction (topological order), if SU and
719 // in the parent graph of SU.
721 SubGraph = DAG->GetTopo()->GetSubGraph(SU, DAG->SUnits[j],
725 SubGraph = DAG->GetTopo()->GetSubGraph(DAG->SUnits[j], SU,
747 // If one of the SU in the subgraph depends on the result of SU j,
756 // Same check for the SU
757 if (hasDataDependencyPred(SU, DAG->SUnits[j])) {
771 FormingGroup.insert(SU.NodeNum);
774 CurrentColoring[SU.NodeNum] = ProposedColor;
784 FormingGroup.insert(SU.NodeNum);
785 CurrentColoring[SU.NodeNum] = ProposedColor;
811 SUnit *SU = &DAG->SUnits[SUNum];
815 if (CurrentColoring[SU->NodeNum]) {
816 CurrentTopDownReservedDependencyColoring[SU->NodeNum] =
817 CurrentColoring[SU->NodeNum];
821 for (SDep& PredDep : SU->Preds) {
833 CurrentTopDownReservedDependencyColoring[SU->NodeNum] =
839 CurrentTopDownReservedDependencyColoring[SU->NodeNum] = Pos->second;
841 CurrentTopDownReservedDependencyColoring[SU->NodeNum] =
853 SUnit *SU = &DAG->SUnits[SUNum];
857 if (CurrentColoring[SU->NodeNum]) {
858 CurrentBottomUpReservedDependencyColoring[SU->NodeNum] =
859 CurrentColoring[SU->NodeNum];
863 for (SDep& SuccDep : SU->Succs) {
875 CurrentBottomUpReservedDependencyColoring[SU->NodeNum] =
881 CurrentBottomUpReservedDependencyColoring[SU->NodeNum] = Pos->second;
883 CurrentBottomUpReservedDependencyColoring[SU->NodeNum] =
899 SUnit *SU = &DAG->SUnits[i];
903 if (CurrentColoring[SU->NodeNum])
906 SUColors.first = CurrentTopDownReservedDependencyColoring[SU->NodeNum];
907 SUColors.second = CurrentBottomUpReservedDependencyColoring[SU->NodeNum];
912 CurrentColoring[SU->NodeNum] = Pos->second;
914 CurrentColoring[SU->NodeNum] = NextNonReservedID;
936 SUnit *SU = &DAG->SUnits[SUNum];
940 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
943 if (CurrentBottomUpReservedDependencyColoring[SU->NodeNum] > 0 ||
944 CurrentTopDownReservedDependencyColoring[SU->NodeNum] > 0)
947 for (SDep& SuccDep : SU->Succs) {
960 PendingColoring[SU->NodeNum] = *SUColors.begin();
963 PendingColoring[SU->NodeNum] = NextNonReservedID++;
980 SUnit *SU = &DAG->SUnits[i];
983 assert(i == SU->NodeNum);
989 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1006 SUnit *SU = &DAG->SUnits[SUNum];
1009 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1014 if (SU->Preds.size() > 0 && !DAG->IsLowLatencySU[SU->NodeNum])
1017 for (SDep& SuccDep : SU->Succs) {
1024 CurrentColoring[SU->NodeNum] = *SUColors.begin();
1032 SUnit *SU = &DAG->SUnits[SUNum];
1035 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1038 for (SDep& SuccDep : SU->Succs) {
1045 CurrentColoring[SU->NodeNum] = *SUColors.begin();
1053 SUnit *SU = &DAG->SUnits[SUNum];
1056 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1059 for (SDep& SuccDep : SU->Succs) {
1066 CurrentColoring[SU->NodeNum] = *SUColors.begin();
1075 SUnit *SU = &DAG->SUnits[SUNum];
1076 unsigned color = CurrentColoring[SU->NodeNum];
1081 SUnit *SU = &DAG->SUnits[SUNum];
1082 unsigned color = CurrentColoring[SU->NodeNum];
1085 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1091 for (SDep& SuccDep : SU->Succs) {
1099 CurrentColoring[SU->NodeNum] = *SUColors.begin();
1114 SUnit *SU = &DAG->SUnits[SUNum];
1117 if (CurrentColoring[SU->NodeNum] <= (int)DAGSize)
1120 for (SDep& SuccDep : SU->Succs) {
1127 CurrentColoring[SU->NodeNum] = GroupID;
1146 const SUnit &SU = DAG->SUnits[SUNum];
1147 if (SIInstrInfo::isEXP(*SU.getInstr())) {
1155 // By construction (topological order), if SU and
1157 // in the parent graph of SU.
1159 SubGraph = DAG->GetTopo()->GetSubGraph(SU, DAG->SUnits[j],
1163 SubGraph = DAG->GetTopo()->GetSubGraph(DAG->SUnits[j], SU,
1169 // between EXP SUnits[j] and EXP SU.
1221 SUnit *SU = &DAG->SUnits[i];
1222 unsigned Color = CurrentColoring[SU->NodeNum];
1229 CurrentBlocks[RealID[Color]]->addUnit(SU);
1230 Node2CurrentBlock[SU->NodeNum] = RealID[Color];
1235 SUnit *SU = &DAG->SUnits[i];
1237 for (SDep& SuccDep : SU->Succs) {
1245 for (SDep& PredDep : SU->Preds) {
1355 for (SUnit* SU : SUs) {
1356 MachineInstr *MI = SU->getInstr();
1786 for (SUnit* SU : SUs)
1787 Res.SUs.push_back(SU->NodeNum);
1827 SUnit *SU = &SUnits[ScheduledSUnits[i]];
1831 for (SDep& PredDep : SU->Preds) {
1843 if (SITII->isLowLatencyInstruction(*SU->getInstr())) {
1854 ScheduledSUnits[BestPos] = SU->NodeNum;
1855 ScheduledSUnitsInv[SU->NodeNum] = BestPos;
1864 } else if (SU->getInstr()->getOpcode() == AMDGPU::COPY) {
1866 for (SDep& SuccDep : SU->Succs) {
1881 ScheduledSUnits[MinPos] = SU->NodeNum;
1882 ScheduledSUnitsInv[SU->NodeNum] = MinPos;
1949 SUnit *SU = &SUnits[i];
1952 if (SITII->isLowLatencyInstruction(*SU->getInstr())) {
1955 if (SITII->getMemOperandWithOffset(*SU->getInstr(), BaseLatOp, OffLatReg,
1958 } else if (SITII->isHighLatencyDef(SU->getInstr()->getOpcode()))
2025 SUnit *SU = &SUnits[*I];
2027 scheduleMI(SU, true);
2029 LLVM_DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") "
2030 << *SU->getInstr());