Lines Matching refs:Src0Idx
1878 unsigned Src0Idx,
1888 static_cast<int>(Src0Idx) &&
1893 MachineOperand &Src0 = MI.getOperand(Src0Idx);
1901 = TargetInstrInfo::commuteInstructionImpl(MI, NewMI, Src0Idx, Src1Idx);
1941 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
1942 if (Src0Idx == -1)
1949 return fixCommutedOpIndices(SrcOpIdx0, SrcOpIdx1, Src0Idx, Src1Idx);
2891 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
2893 const MachineOperand *Src0 = &MI.getOperand(Src0Idx);
2897 if (Src0->isImm() && !isInlineConstant(MI, Src0Idx, *Src0))
3508 int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0);
3623 const int OpIndicies[] = { DstIdx, Src0Idx, Src1Idx, Src2Idx };
3746 const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx };
3807 for (int OpIdx : {Src0Idx, Src1Idx, Src2Idx}) {
3830 const MachineOperand &Src0 = MI.getOperand(Src0Idx);
3843 const MachineOperand &Src0 = MI.getOperand(Src0Idx);
3848 !isInlineConstant(Src0, Desc.OpInfo[Src0Idx].OperandType))
3917 const MachineOperand &Src0 = MI.getOperand(Src0Idx);
4355 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
4356 MachineOperand &Src0 = MI.getOperand(Src0Idx);
4366 isLiteralConstantLike(Src0, InstrDesc.OpInfo[Src0Idx])))
4367 legalizeOpWithMove(MI, Src0Idx);
4392 legalizeOpWithMove(MI, Src0Idx);
6512 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
6513 if (Src0Idx == -1)
6516 if (isLiteralConstantLike(MI.getOperand(Src0Idx), Desc.OpInfo[Src0Idx]))