Lines Matching defs:VRC
4178 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC);
4179 if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC))
4180 VRC = &AMDGPU::VReg_64RegClass;
4182 VRC = &AMDGPU::VGPR_32RegClass;
4184 Register Reg = MRI.createVirtualRegister(VRC);
4551 const TargetRegisterClass *VRC = MRI.getRegClass(SrcReg);
4552 const TargetRegisterClass *SRC = RI.getEquivalentSGPRClass(VRC);
4554 unsigned SubRegs = RI.getRegSizeInBits(*VRC) / 32;
4556 if (RI.hasAGPRs(VRC)) {
4557 VRC = RI.getEquivalentVGPRClass(VRC);
4558 Register NewSrcReg = MRI.createVirtualRegister(VRC);
4878 const TargetRegisterClass *RC = nullptr, *SRC = nullptr, *VRC = nullptr;
4886 VRC = OpRC;
4895 if (VRC || !RI.isSGPRClass(getOpRegClass(MI, 0))) {
4896 if (!VRC) {
4899 VRC = &AMDGPU::VReg_1RegClass;
4901 VRC = RI.hasAGPRs(getOpRegClass(MI, 0))
4905 VRC = RI.hasAGPRs(getOpRegClass(MI, 0))
4906 ? RI.getEquivalentAGPRClass(VRC)
4907 : RI.getEquivalentVGPRClass(VRC);
4909 RC = VRC;
4946 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC);
4947 if (VRC == OpRC)
4950 legalizeGenericOperand(*MBB, MI, VRC, Op, MRI, MI.getDebugLoc());