Lines Matching defs:SubIdx
820 unsigned SubIdx;
822 SubIdx = SubIndices[Idx];
824 SubIdx = SubIndices[SubIndices.size() - Idx - 1];
827 copyPhysReg(MBB, MI, DL, RI.getSubReg(DestReg, SubIdx),
828 RI.getSubReg(SrcReg, SubIdx), KillSrc);
833 get(Opcode), RI.getSubReg(DestReg, SubIdx));
835 Builder.addReg(RI.getSubReg(SrcReg, SubIdx));
2454 unsigned SubIdx = SubIndices[Idx];
2460 .addReg(FalseReg, 0, SubIdx)
2461 .addReg(TrueReg, 0, SubIdx);
2465 .addReg(TrueReg, 0, SubIdx)
2466 .addReg(FalseReg, 0, SubIdx);
2473 .addImm(SubIdx);
4194 unsigned SubIdx,
4203 .addReg(SuperReg.getReg(), 0, SubIdx);
4209 // SubIdx passed to this function. The register coalescer should be able to
4217 .addReg(NewSuperReg, 0, SubIdx);
4227 unsigned SubIdx,
4230 if (SubIdx == AMDGPU::sub0)
4232 if (SubIdx == AMDGPU::sub1)
4239 SubIdx, SubRC);