Lines Matching defs:CC
883 CallingConv::ID CC,
885 if (CC == CallingConv::AMDGPU_KERNEL)
886 return TargetLowering::getRegisterTypeForCallingConv(Context, CC, VT);
902 return TargetLowering::getRegisterTypeForCallingConv(Context, CC, VT);
906 CallingConv::ID CC,
908 if (CC == CallingConv::AMDGPU_KERNEL)
909 return TargetLowering::getNumRegistersForCallingConv(Context, CC, VT);
927 return TargetLowering::getNumRegistersForCallingConv(Context, CC, VT);
931 LLVMContext &Context, CallingConv::ID CC,
934 if (CC != CallingConv::AMDGPU_KERNEL && VT.isVector()) {
964 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT);
2366 // for shaders. Vector types should be explicitly handled by CC.
2693 static bool canGuaranteeTCO(CallingConv::ID CC) {
2694 return CC == CallingConv::Fast;
2698 static bool mayTailCallThisCC(CallingConv::ID CC) {
2699 switch (CC) {
2703 return canGuaranteeTCO(CC);
2834 // Note the issue is with the CC of the calling function, not of the call
10343 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
10350 CC = getSetCCSwappedOperands(CC);
10362 (CC == ISD::SETNE || CC == ISD::SETGT || CC == ISD::SETULT)) ||
10364 (CC == ISD::SETEQ || CC == ISD::SETGE || CC == ISD::SETULE)))
10368 (CC == ISD::SETEQ || CC == ISD::SETLE || CC == ISD::SETUGE)) ||
10370 (CC == ISD::SETNE || CC == ISD::SETUGT || CC == ISD::SETLT)))
10375 if ((CC == ISD::SETEQ || CC == ISD::SETNE) &&
10389 if ((CF == CRHSVal && CC == ISD::SETEQ) ||
10390 (CT == CRHSVal && CC == ISD::SETNE))
10393 if ((CF == CRHSVal && CC == ISD::SETNE) ||
10394 (CT == CRHSVal && CC == ISD::SETEQ))
10407 if ((CC == ISD::SETOEQ || CC == ISD::SETONE) && LHS.getOpcode() == ISD::FABS) {
10422 unsigned Mask = CC == ISD::SETOEQ ? IsInfMask : IsFiniteMask;