Lines Matching refs:MFI
75 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
87 if (MFI->haveFreeLanesForSGPRSpill(MF, 1)) {
91 if (!MFI->allocateSGPRSpillToVGPR(MF, NewFI))
96 LLVM_DEBUG(auto Spill = MFI->getSGPRToVGPRSpills(NewFI).front();
111 if (MFI->allocateSGPRSpillToVGPR(MF, NewFI)) {
120 LLVM_DEBUG(auto Spill = MFI->getSGPRToVGPRSpills(NewFI).front();
138 MachineFrameInfo &MFI = MF->getFrameInfo();
140 int64_t Offset = MFI.getObjectOffset(FI);
144 MFI.getObjectAlign(FI));
186 MachineFrameInfo &MFI = MF->getFrameInfo();
187 int64_t Offset = MFI.getObjectOffset(FI);
191 MFI.getObjectAlign(FI));
228 // Emit flat scratch setup code, assuming `MFI->hasFlatScratchInit()`
235 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
248 MFI->getPreloadedReg(AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT);
313 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
315 assert(MFI->isEntryFunction());
317 Register ScratchRsrcReg = MFI->getScratchRSrcReg();
335 unsigned NumPreloaded = (MFI->getNumPreloadedSGPRs() + 3) / 4;
341 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF);
349 MFI->setScratchRSrcReg(Reg);
372 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
379 assert(MFI->isEntryFunction());
381 Register PreloadedScratchWaveOffsetReg = MFI->getPreloadedReg(
409 MFI->getPreloadedReg(AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER);
431 unsigned NumPreloaded = MFI->getNumPreloadedSGPRs();
434 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF);
450 Register SPReg = MFI->getStackPtrOffsetReg();
457 Register FPReg = MFI->getFrameOffsetReg();
462 if (MFI->hasFlatScratchInit() || ScratchRsrcReg) {
467 if (MFI->hasFlatScratchInit()) {
487 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
499 if (MFI->getGITPtrHigh() != 0xffffffff) {
501 .addImm(MFI->getGITPtrHigh())
507 Register GitPtrLo = MFI->getGITPtrLoReg(MF);
543 if (MFI->hasImplicitBufferPtr()) {
550 .addReg(MFI->getImplicitBufferPtrUserSGPR())
562 .addReg(MFI->getImplicitBufferPtrUserSGPR())
569 MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR());
570 MBB.addLiveIn(MFI->getImplicitBufferPtrUserSGPR());
690 const MachineFrameInfo &MFI = MF.getFrameInfo();
707 uint32_t NumBytes = MFI.getStackSize();
718 SpillFPToMemory = MFI.getStackID(*FuncInfo->FramePointerSaveIndex) !=
727 SpillBPToMemory = MFI.getStackID(*FuncInfo->BasePointerSaveIndex) !=
779 assert(!MFI.isDeadObjectIndex(FuncInfo->FramePointerSaveIndex.getValue()));
796 assert(!MFI.isDeadObjectIndex(*FuncInfo->BasePointerSaveIndex));
824 assert(!MFI.isDeadObjectIndex(FI));
826 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
843 assert(!MFI.isDeadObjectIndex(BasePtrFI));
845 assert(MFI.getStackID(BasePtrFI) == TargetStackID::SGPRSpill);
861 const unsigned Alignment = MFI.getMaxAlign().value();
941 const MachineFrameInfo &MFI = MF.getFrameInfo();
942 uint32_t NumBytes = MFI.getStackSize();
944 ? NumBytes + MFI.getMaxAlign().value()
954 SpillFPToMemory = MFI.getStackID(*FuncInfo->FramePointerSaveIndex) !=
961 SpillBPToMemory = MFI.getStackID(*FuncInfo->BasePointerSaveIndex) !=
987 assert(!MFI.isDeadObjectIndex(FI));
1000 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
1013 assert(!MFI.isDeadObjectIndex(BasePtrFI));
1026 assert(MFI.getStackID(BasePtrFI) == TargetStackID::SGPRSpill);
1061 static bool allStackObjectsAreDead(const MachineFrameInfo &MFI) {
1062 for (int I = MFI.getObjectIndexBegin(), E = MFI.getObjectIndexEnd();
1064 if (!MFI.isDeadObjectIndex(I))
1072 static bool allSGPRSpillsAreDead(const MachineFrameInfo &MFI,
1075 for (int I = MFI.getObjectIndexBegin(), E = MFI.getObjectIndexEnd();
1077 if (!MFI.isDeadObjectIndex(I) &&
1078 MFI.getStackID(I) == TargetStackID::SGPRSpill &&
1100 MachineFrameInfo &MFI = MF.getFrameInfo();
1106 FuncInfo->removeDeadFrameIndices(MFI);
1107 assert(allSGPRSpillsAreDead(MFI, None, None) &&
1113 if (!allStackObjectsAreDead(MFI)) {
1117 int ScavengeFI = MFI.CreateFixedObject(
1121 int ScavengeFI = MFI.CreateStackObject(
1134 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
1135 if (MFI->isEntryFunction())
1159 for (auto SSpill : MFI->getSGPRSpillVGPRs())
1166 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy,
1167 MFI->FramePointerSaveIndex, true);
1171 if (MFI->SGPRForFPSaveRestoreCopy)
1172 LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy);
1173 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy,
1174 MFI->BasePointerSaveIndex, false);
1182 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
1183 if (MFI->isEntryFunction())
1190 SavedRegs.reset(MFI->getStackPtrOffsetReg());
1250 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
1251 Register SPReg = MFI->getStackPtrOffsetReg();
1265 const MachineFrameInfo &MFI = MF.getFrameInfo();
1269 if (MFI.hasCalls() &&
1276 return MFI.getStackSize() != 0;
1279 return MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
1280 MFI.hasStackMap() || MFI.hasPatchPoint() ||