Lines Matching refs:MBBI
642 MachineBasicBlock::iterator MBBI,
665 LiveRegs.stepBackward(*MBBI);
677 BuildMI(MBB, MBBI, DL, TII->get(OrSaveExec), ScratchExecCopy).addImm(-1);
702 MachineBasicBlock::iterator MBBI = MBB.begin();
733 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FuncInfo->SGPRForFPSaveRestoreCopy)
740 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY),
770 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, true);
772 buildPrologSpill(LiveRegs, MBB, MBBI, TII, Reg.VGPR,
782 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, true);
787 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpVGPR)
790 buildPrologSpill(LiveRegs, MBB, MBBI, TII, TmpVGPR,
799 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, true);
804 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpVGPR)
807 buildPrologSpill(LiveRegs, MBB, MBBI, TII, TmpVGPR,
816 BuildMI(MBB, MBBI, DL, TII->get(ExecMov), Exec)
833 BuildMI(MBB, MBBI, DL, TII->getMCOpcodeFromPseudo(AMDGPU::V_WRITELANE_B32),
852 BuildMI(MBB, MBBI, DL, TII->getMCOpcodeFromPseudo(AMDGPU::V_WRITELANE_B32),
878 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), ScratchSPReg)
882 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_AND_B32), FramePtrReg)
888 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg)
898 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg)
904 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_U32), StackPtrReg)
937 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
966 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_SUB_U32), StackPtrReg)
973 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg)
979 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg)
990 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, false);
994 buildEpilogReload(LiveRegs, MBB, MBBI, TII, TempVGPR,
996 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), FramePtrReg)
1004 BuildMI(MBB, MBBI, DL, TII->getMCOpcodeFromPseudo(AMDGPU::V_READLANE_B32),
1016 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, false);
1020 buildEpilogReload(LiveRegs, MBB, MBBI, TII, TempVGPR,
1022 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), BasePtrReg)
1030 BuildMI(MBB, MBBI, DL, TII->getMCOpcodeFromPseudo(AMDGPU::V_READLANE_B32),
1043 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, false);
1045 buildEpilogReload(LiveRegs, MBB, MBBI, TII, Reg.VGPR,
1054 BuildMI(MBB, MBBI, DL, TII->get(ExecMov), Exec)