Lines Matching refs:isReg
53 assert(FoldOp->isReg() || FoldOp->isGlobal());
66 bool isReg() const {
190 assert(Old.isReg());
393 if (CanCommute && (!MI->getOperand(CommuteIdx0).isReg() ||
394 !MI->getOperand(CommuteIdx1).isReg()))
412 if (!OtherOp.isReg() ||
483 assert (Sub->isReg());
486 SubDef && Sub->isReg() && !Sub->getSubReg() &&
495 if (!Op->isReg())
527 if (!OpToFold.isReg())
578 if (UseOp.isReg() && OpToFold.isReg()) {
626 if ((!SOff.isReg() || SOff.getReg() != MFI->getStackPtrOffsetReg()) &&
701 if (UseMI->isCopy() && OpToFold.isReg() &&
743 } else if (Def->isReg() && TRI->isAGPR(*MRI, Def->getReg())) {
756 assert(Def->isReg());
832 if (OpToFold.isReg() && TRI->isSGPRReg(*MRI, OpToFold.getReg())) {
992 if (Op.isReg()) {
1045 bool UseCopy = TII->getNamedOperand(*MI, AMDGPU::OpName::src2)->isReg();
1148 TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY : getMovOpc(false));
1264 assert(!Fold.isReg() || Fold.OpToFold);
1265 if (Fold.isReg() && Register::isVirtualRegister(Fold.OpToFold->getReg())) {
1274 if (Fold.isReg()) {
1275 assert(Fold.OpToFold && Fold.OpToFold->isReg());
1307 if (!Src0->isReg() || !Src1->isReg() ||
1453 if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
1473 if (OMod == SIOutMods::NONE || !RegOp->isReg() ||
1547 CurrentKnownM0Val = (NewM0Val.isReg() && NewM0Val.getReg().isPhysical()) ?
1557 if (!FoldingImm && !OpToFold.isReg())
1560 if (OpToFold.isReg() && !Register::isVirtualRegister(OpToFold.getReg()))
1570 if (Dst.isReg() && !Register::isVirtualRegister(Dst.getReg()))