Lines Matching defs:DefInst
96 MachineInstr *DefInst = MRI.getUniqueVRegDef(WOp->getReg());
97 switch (DefInst->getOpcode()) {
101 Worklist.push_back(&DefInst->getOperand(1));
104 if (DefInst->getNumOperands() != 5)
106 Worklist.push_back(&DefInst->getOperand(1));
107 Worklist.push_back(&DefInst->getOperand(3));
113 if (DefInst->getOperand(2).getSubReg() != AMDGPU::NoSubRegister)
115 BaseReg = DefInst->getOperand(2).getReg();
116 if (DefInst->getOperand(3).getSubReg() != AMDGPU::NoSubRegister)
118 IndexReg = DefInst->getOperand(3).getReg();