Lines Matching refs:MCOperand
766 Inst.addOperand(MCOperand::createExpr(Expr));
773 Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
793 Inst.addOperand(MCOperand::createImm(Mods.getModifiersOperand()));
813 Inst.addOperand(MCOperand::createExpr(Expr));
1728 Inst.addOperand(MCOperand::createImm(Imm.Val));
1755 Inst.addOperand(MCOperand::createImm(Literal.getZExtValue()));
1768 Inst.addOperand(MCOperand::createImm(Literal.lshr(32).getZExtValue()));
1804 Inst.addOperand(MCOperand::createImm(ImmVal));
1828 Inst.addOperand(MCOperand::createImm(Val));
1832 Inst.addOperand(MCOperand::createImm(Val & 0xffffffff));
1840 Inst.addOperand(MCOperand::createImm(Val));
1844 Inst.addOperand(MCOperand::createImm(Lo_32(Val)));
1856 Inst.addOperand(MCOperand::createImm(Val));
1860 Inst.addOperand(MCOperand::createImm(Val & 0xffff));
1871 Inst.addOperand(MCOperand::createImm(Val));
1885 Inst.addOperand(MCOperand::createImm(Literal.getLoBits(Bitwidth).getZExtValue()));
1893 Inst.addOperand(MCOperand::createImm(FPLiteral.bitcastToAPInt().getZExtValue()));
1897 Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));
2826 const MCOperand &MO = Inst.getOperand(OpIdx);
2882 const MCOperand &MO = Inst.getOperand(OpIdx);
2927 const MCOperand &MO = Inst.getOperand(OpIdx);
2990 const MCOperand &Dst = Inst.getOperand(DstIdx);
2998 const MCOperand &Src = Inst.getOperand(SrcIdx);
3162 const MCOperand &Src0 = Inst.getOperand(Src0Idx);
3181 const MCOperand &Src0 = Inst.getOperand(Src0Idx);
3379 const MCOperand &Src = Inst.getOperand(SrcIdx);
3388 const MCOperand &Src = Inst.getOperand(Src0Idx);
3503 const MCOperand &MO = Inst.getOperand(OpIdx);
3561 const MCOperand &MO = Inst.getOperand(OpIdx);
4845 Inst.addOperand(MCOperand::createImm(Default));
4945 Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0
4981 Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0
5006 Inst.addOperand(MCOperand::createReg(AMDGPU::NoRegister));
5042 Inst.addOperand(MCOperand::createImm(EnMask));
6410 Inst.addOperand(MCOperand::createImm(Op.getImm()));
6488 it = Inst.insert(it, MCOperand::createImm(0)); // no modifiers for src2
6930 Inst.addOperand(MCOperand::createImm(Fi? DPP8_FI_1 : DPP8_FI_0));