Lines Matching refs:MCInst
1 //===- AMDGPUAsmParser.cpp - Parse SI asm to MCInst instructions ----------===//
32 #include "llvm/MC/MCInst.h"
741 void addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers = true) const;
743 void addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const;
746 void addKImmFPOperands(MCInst &Inst, unsigned N) const;
748 void addKImmFP16Operands(MCInst &Inst, unsigned N) const {
752 void addKImmFP32Operands(MCInst &Inst, unsigned N) const {
756 void addRegOperands(MCInst &Inst, unsigned N) const;
758 void addBoolRegOperands(MCInst &Inst, unsigned N) const {
762 void addRegOrImmOperands(MCInst &Inst, unsigned N) const {
771 void addRegOrImmWithInputModsOperands(MCInst &Inst, unsigned N) const {
781 void addRegOrImmWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
786 void addRegOrImmWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
791 void addRegWithInputModsOperands(MCInst &Inst, unsigned N) const {
798 void addRegWithFPInputModsOperands(MCInst &Inst, unsigned N) const {
803 void addRegWithIntInputModsOperands(MCInst &Inst, unsigned N) const {
808 void addSoppBrTargetOperands(MCInst &Inst, unsigned N) const {
1094 void cvtMubufImpl(MCInst &Inst, const OperandVector &Operands,
1096 void cvtDSImpl(MCInst &Inst, const OperandVector &Operands,
1250 unsigned checkTargetMatchPredicate(MCInst &Inst) override;
1263 //bool ProcessInstruction(MCInst &Inst);
1300 void cvtDSOffset01(MCInst &Inst, const OperandVector &Operands);
1301 void cvtDS(MCInst &Inst, const OperandVector &Operands) { cvtDSImpl(Inst, Operands, false); }
1302 void cvtDSGds(MCInst &Inst, const OperandVector &Operands) { cvtDSImpl(Inst, Operands, true); }
1303 void cvtExp(MCInst &Inst, const OperandVector &Operands);
1335 bool validateInstruction(const MCInst &Inst, const SMLoc &IDLoc, const OperandVector &Operands);
1336 bool validateFlatOffset(const MCInst &Inst, const OperandVector &Operands);
1337 bool validateSMEMOffset(const MCInst &Inst, const OperandVector &Operands);
1338 bool validateSOPLiteral(const MCInst &Inst) const;
1339 bool validateConstantBusLimitations(const MCInst &Inst);
1340 bool validateEarlyClobberLimitations(const MCInst &Inst);
1341 bool validateIntClampSupported(const MCInst &Inst);
1342 bool validateMIMGAtomicDMask(const MCInst &Inst);
1343 bool validateMIMGGatherDMask(const MCInst &Inst);
1344 bool validateMovrels(const MCInst &Inst);
1345 bool validateMIMGDataSize(const MCInst &Inst);
1346 bool validateMIMGAddrSize(const MCInst &Inst);
1347 bool validateMIMGD16(const MCInst &Inst);
1348 bool validateMIMGDim(const MCInst &Inst);
1349 bool validateLdsDirect(const MCInst &Inst);
1350 bool validateOpSel(const MCInst &Inst);
1352 bool validateVOP3Literal(const MCInst &Inst) const;
1353 bool validateMAIAccWrite(const MCInst &Inst);
1355 bool usesConstantBus(const MCInst &Inst, unsigned OpIdx);
1356 bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
1357 unsigned findImplicitSGPRReadInVOP(const MCInst &Inst) const;
1404 void cvtMubuf(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, false, false); }
1405 void cvtMubufAtomic(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true, false); }
1406 void cvtMubufAtomicReturn(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, true, true); }
1407 void cvtMubufLds(MCInst &Inst, const OperandVector &Operands) { cvtMubufImpl(Inst, Operands, false, false, true); }
1408 void cvtMtbuf(MCInst &Inst, const OperandVector &Operands);
1421 void cvtVOP3(MCInst &Inst, const OperandVector &Operands,
1423 void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands);
1424 void cvtVOP3(MCInst &Inst, const OperandVector &Operands);
1425 void cvtVOP3P(MCInst &Inst, const OperandVector &Operands);
1427 void cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands);
1429 void cvtMIMG(MCInst &Inst, const OperandVector &Operands,
1431 void cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands);
1440 void cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8 = false);
1441 void cvtDPP8(MCInst &Inst, const OperandVector &Operands) { cvtDPP(Inst, Operands, true); }
1446 void cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands);
1447 void cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands);
1448 void cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands);
1449 void cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands);
1450 void cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands);
1451 void cvtSDWA(MCInst &Inst, const OperandVector &Operands,
1720 void AMDGPUOperand::addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers) const {
1732 void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const {
1880 void AMDGPUOperand::addKImmFPOperands(MCInst &Inst, unsigned N) const {
1896 void AMDGPUOperand::addRegOperands(MCInst &Inst, unsigned N) const {
2736 unsigned AMDGPUAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
2795 unsigned AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const {
2818 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst,
2881 bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) {
2894 bool AMDGPUAsmParser::validateConstantBusLimitations(const MCInst &Inst) {
2973 bool AMDGPUAsmParser::validateEarlyClobberLimitations(const MCInst &Inst) {
3010 bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {
3024 bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst) {
3057 bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst) {
3097 bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) {
3117 bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) {
3151 bool AMDGPUAsmParser::validateMovrels(const MCInst &Inst) {
3171 bool AMDGPUAsmParser::validateMAIAccWrite(const MCInst &Inst) {
3195 bool AMDGPUAsmParser::validateMIMGD16(const MCInst &Inst) {
3212 bool AMDGPUAsmParser::validateMIMGDim(const MCInst &Inst) {
3359 bool AMDGPUAsmParser::validateLdsDirect(const MCInst &Inst) {
3405 bool AMDGPUAsmParser::validateFlatOffset(const MCInst &Inst,
3454 bool AMDGPUAsmParser::validateSMEMOffset(const MCInst &Inst,
3485 bool AMDGPUAsmParser::validateSOPLiteral(const MCInst &Inst) const {
3521 bool AMDGPUAsmParser::validateOpSel(const MCInst &Inst) {
3542 bool AMDGPUAsmParser::validateVOP3Literal(const MCInst &Inst) const {
3587 bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,
3681 MCInst Inst;
4836 MCInst& Inst, const OperandVector& Operands,
4874 // values to live in a joint format operand in the MCInst encoding.
4924 void AMDGPUAsmParser::cvtDSOffset01(MCInst &Inst,
4948 void AMDGPUAsmParser::cvtDSImpl(MCInst &Inst, const OperandVector &Operands,
4984 void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) {
5989 void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
6023 // asm string. There are no MCInst operands for these.
6062 void AMDGPUAsmParser::cvtMtbuf(MCInst &Inst, const OperandVector &Operands) {
6081 // asm string. There are no MCInst operands for these.
6106 void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands,
6155 void AMDGPUAsmParser::cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands) {
6357 void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands) {
6392 void AMDGPUAsmParser::cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands)
6431 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands,
6494 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
6499 void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst,
6876 void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8) {
7008 void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) {
7012 void AMDGPUAsmParser::cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands) {
7016 void AMDGPUAsmParser::cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands) {
7020 void AMDGPUAsmParser::cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands) {
7024 void AMDGPUAsmParser::cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands) {
7028 void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,