Lines Matching refs:ArgInfo
1161 if (YamlMFI.ArgInfo &&
1162 (parseAndCheckArgument(YamlMFI.ArgInfo->PrivateSegmentBuffer,
1164 MFI->ArgInfo.PrivateSegmentBuffer, 4, 0) ||
1165 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr,
1166 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchPtr,
1168 parseAndCheckArgument(YamlMFI.ArgInfo->QueuePtr, AMDGPU::SReg_64RegClass,
1169 MFI->ArgInfo.QueuePtr, 2, 0) ||
1170 parseAndCheckArgument(YamlMFI.ArgInfo->KernargSegmentPtr,
1172 MFI->ArgInfo.KernargSegmentPtr, 2, 0) ||
1173 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchID,
1174 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchID,
1176 parseAndCheckArgument(YamlMFI.ArgInfo->FlatScratchInit,
1178 MFI->ArgInfo.FlatScratchInit, 2, 0) ||
1179 parseAndCheckArgument(YamlMFI.ArgInfo->PrivateSegmentSize,
1181 MFI->ArgInfo.PrivateSegmentSize, 0, 0) ||
1182 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDX,
1183 AMDGPU::SGPR_32RegClass, MFI->ArgInfo.WorkGroupIDX,
1185 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDY,
1186 AMDGPU::SGPR_32RegClass, MFI->ArgInfo.WorkGroupIDY,
1188 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupIDZ,
1189 AMDGPU::SGPR_32RegClass, MFI->ArgInfo.WorkGroupIDZ,
1191 parseAndCheckArgument(YamlMFI.ArgInfo->WorkGroupInfo,
1193 MFI->ArgInfo.WorkGroupInfo, 0, 1) ||
1194 parseAndCheckArgument(YamlMFI.ArgInfo->PrivateSegmentWaveByteOffset,
1196 MFI->ArgInfo.PrivateSegmentWaveByteOffset, 0, 1) ||
1197 parseAndCheckArgument(YamlMFI.ArgInfo->ImplicitArgPtr,
1199 MFI->ArgInfo.ImplicitArgPtr, 0, 0) ||
1200 parseAndCheckArgument(YamlMFI.ArgInfo->ImplicitBufferPtr,
1202 MFI->ArgInfo.ImplicitBufferPtr, 2, 0) ||
1203 parseAndCheckArgument(YamlMFI.ArgInfo->WorkItemIDX,
1205 MFI->ArgInfo.WorkItemIDX, 0, 0) ||
1206 parseAndCheckArgument(YamlMFI.ArgInfo->WorkItemIDY,
1208 MFI->ArgInfo.WorkItemIDY, 0, 0) ||
1209 parseAndCheckArgument(YamlMFI.ArgInfo->WorkItemIDZ,
1211 MFI->ArgInfo.WorkItemIDZ, 0, 0)))