Lines Matching refs:CurDAG
427 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other);
429 SDValue TiedIn = CurDAG->getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), VT, Lo);
443 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdHi), VTList,
447 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), NewLoadHi);
448 CurDAG->ReplaceAllUsesOfValueWith(SDValue(LdHi, 1), NewLoadHi.getValue(1));
461 SDVTList VTList = CurDAG->getVTList(VT, MVT::Other);
470 TiedIn = CurDAG->getNode(ISD::BITCAST, SDLoc(N), VT, TiedIn);
477 CurDAG->getMemIntrinsicNode(LoadOp, SDLoc(LdLo), VTList,
481 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), NewLoadLo);
482 CurDAG->ReplaceAllUsesOfValueWith(SDValue(LdLo, 1), NewLoadLo.getValue(1));
493 SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_end();
496 while (Position != CurDAG->allnodes_begin()) {
511 CurDAG->RemoveDeadNodes();
513 CurDAG->dump(););
525 return CurDAG->isKnownNeverNaN(N);
562 MachineRegisterInfo &MRI = CurDAG->getMachineFunction().getRegInfo();
608 return CurDAG->MorphNodeTo(N, N->getOpcode(), N->getVTList(), Ops);
617 SDValue M0 = Lowering.copyToM0(*CurDAG, N->getOperand(0), SDLoc(N), Val);
625 return glueCopyToM0(N, CurDAG->getTargetConstant(-1, SDLoc(N), MVT::i32));
627 MachineFunction &MF = CurDAG->getMachineFunction();
630 glueCopyToM0(N, CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i32));
637 SDNode *Lo = CurDAG->getMachineNode(
639 CurDAG->getTargetConstant(Imm & 0xFFFFFFFF, DL, MVT::i32));
641 CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32,
642 CurDAG->getTargetConstant(Imm >> 32, DL, MVT::i32));
644 CurDAG->getTargetConstant(AMDGPU::SReg_64RegClassID, DL, MVT::i32),
645 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
646 SDValue(Hi, 0), CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32)};
648 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, DL, VT, Ops);
656 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32);
659 CurDAG->SelectNodeTo(N, AMDGPU::COPY_TO_REGCLASS, EltVT, N->getOperand(0),
671 bool IsGCN = CurDAG->getSubtarget().getTargetTriple().getArch() ==
673 RegSeqArgs[0] = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32);
685 RegSeqArgs[1 + (2 * i) + 1] = CurDAG->getTargetConstant(Sub, DL, MVT::i32);
690 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,
697 CurDAG->getTargetConstant(Sub, DL, MVT::i32);
703 CurDAG->SelectNodeTo(N, AMDGPU::REG_SEQUENCE, N->getVTList(), RegSeqArgs);
769 if (SDNode *Packed = packConstantV2I16(N, *CurDAG)) {
788 RC = CurDAG->getTargetConstant(AMDGPU::SGPR_128RegClassID, DL, MVT::i32);
789 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0_sub1, DL, MVT::i32);
790 SubReg1 = CurDAG->getTargetConstant(AMDGPU::sub2_sub3, DL, MVT::i32);
792 RC = CurDAG->getTargetConstant(AMDGPU::SReg_64RegClassID, DL, MVT::i32);
793 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
794 SubReg1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32);
800 ReplaceNode(N, CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, DL,
861 N = Lowering.legalizeTargetIndependentNode(N, *CurDAG);
891 N = CurDAG->MorphNodeTo(N, N->getOpcode(), CurDAG->getVTList(NewVT),
942 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32);
943 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
946 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32);
947 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
951 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
954 Offset = CurDAG->getTargetConstant(0, DL, MVT::i32);
962 SDNode *Mov = CurDAG->getMachineNode(
964 CurDAG->getTargetConstant(Val, DL, MVT::i32));
980 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
981 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32);
983 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
985 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
988 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
990 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
993 SDVTList VTList = CurDAG->getVTList(MVT::i32, MVT::Glue);
1007 AddLo = CurDAG->getMachineNode(Opc, DL, VTList, Args);
1010 AddLo = CurDAG->getMachineNode(CarryOpc, DL, VTList, Args);
1017 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs);
1020 CurDAG->getTargetConstant(AMDGPU::SReg_64RegClassID, DL, MVT::i32),
1026 SDNode *RegSequence = CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, DL,
1047 CurDAG->SelectNodeTo(
1050 CurDAG->getTargetConstant(0, {}, MVT::i1) /*clamp bit*/});
1054 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), {LHS, RHS, CI});
1078 CurDAG->SelectNodeTo(
1081 CurDAG->getTargetConstant(0, {}, MVT::i1) /*clamp bit*/});
1086 CurDAG->SelectNodeTo(N, Opc, N->getVTList(),
1102 CurDAG->SelectNodeTo(N, AMDGPU::V_FMA_F32, N->getVTList(), Ops);
1115 CurDAG->SelectNodeTo(N, AMDGPU::V_MUL_F32_e64, N->getVTList(), Ops);
1130 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
1140 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1);
1143 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
1158 return CurDAG->SignBitIsZero(Base);
1164 if (CurDAG->isBaseWithConstantOffset(Addr)) {
1171 Offset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16);
1179 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32);
1184 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32,
1197 CurDAG->getTargetConstant(0, {}, MVT::i1)); // clamp bit
1201 CurDAG->getMachineNode(SubOp, DL, MVT::i32, Opnds);
1204 Offset = CurDAG->getTargetConstant(ByteOffset, DL, MVT::i16);
1218 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32);
1219 MachineSDNode *MovZero = CurDAG->getMachineNode(AMDGPU::V_MOV_B32_e32,
1222 Offset = CurDAG->getTargetConstant(CAddr->getZExtValue(), DL, MVT::i16);
1229 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i16);
1239 if (CurDAG->isBaseWithConstantOffset(Addr)) {
1248 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8);
1249 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8);
1260 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32);
1265 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32,
1276 CurDAG->getTargetConstant(0, {}, MVT::i1)); // clamp bit
1280 = CurDAG->getMachineNode(SubOp, DL, MVT::i32, Opnds);
1283 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8);
1284 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8);
1295 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32);
1297 = CurDAG->getMachineNode(AMDGPU::V_MOV_B32_e32,
1300 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8);
1301 Offset1 = CurDAG->getTargetConstant(DWordOffset1, DL, MVT::i8);
1309 Offset0 = CurDAG->getTargetConstant(0, DL, MVT::i8);
1310 Offset1 = CurDAG->getTargetConstant(1, DL, MVT::i8);
1329 GLC = CurDAG->getTargetConstant(0, DL, MVT::i1);
1331 SLC = CurDAG->getTargetConstant(0, DL, MVT::i1);
1332 TFE = CurDAG->getTargetConstant(0, DL, MVT::i1);
1333 DLC = CurDAG->getTargetConstant(0, DL, MVT::i1);
1334 SWZ = CurDAG->getTargetConstant(0, DL, MVT::i1);
1336 Idxen = CurDAG->getTargetConstant(0, DL, MVT::i1);
1337 Offen = CurDAG->getTargetConstant(0, DL, MVT::i1);
1338 Addr64 = CurDAG->getTargetConstant(0, DL, MVT::i1);
1339 SOffset = CurDAG->getTargetConstant(0, DL, MVT::i32);
1343 if (CurDAG->isBaseWithConstantOffset(Addr)) {
1356 Addr64 = CurDAG->getTargetConstant(1, DL, MVT::i1);
1374 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16);
1380 Addr64 = CurDAG->getTargetConstant(1, DL, MVT::i1);
1384 VAddr = CurDAG->getTargetConstant(0, DL, MVT::i32);
1390 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16);
1396 Offset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16);
1401 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16);
1403 SDValue(CurDAG->getMachineNode(
1405 CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i32)),
1433 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0);
1444 SLC = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i1);
1457 const MachineFunction &MF = CurDAG->getMachineFunction();
1461 SDValue TFI = CurDAG->getTargetFrameIndex(FI->getIndex(),
1467 TFI, CurDAG->getRegister(Info->getStackPtrOffsetReg(), MVT::i32));
1472 return std::make_pair(N, CurDAG->getTargetConstant(0, DL, MVT::i32));
1481 MachineFunction &MF = CurDAG->getMachineFunction();
1484 Rsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32);
1492 SDValue HighBits = CurDAG->getTargetConstant(Imm & ~4095, DL, MVT::i32);
1493 MachineSDNode *MovHighBits = CurDAG->getMachineNode(
1502 ? CurDAG->getRegister(Info->getStackPtrOffsetReg(), MVT::i32)
1503 : CurDAG->getTargetConstant(0, DL, MVT::i32);
1504 ImmOffset = CurDAG->getTargetConstant(Imm & 4095, DL, MVT::i16);
1509 if (CurDAG->isBaseWithConstantOffset(Addr)) {
1533 CurDAG->SignBitIsZero(N0))) {
1535 ImmOffset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16);
1542 ImmOffset = CurDAG->getTargetConstant(0, DL, MVT::i16);
1556 MachineFunction &MF = CurDAG->getMachineFunction();
1559 SRsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32);
1566 ? CurDAG->getRegister(Info->getStackPtrOffsetReg(), MVT::i32)
1567 : CurDAG->getTargetConstant(0, DL, MVT::i32);
1569 Offset = CurDAG->getTargetConstant(CAddr->getZExtValue(), DL, MVT::i16);
1596 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0);
1674 if (CurDAG->isBaseWithConstantOffset(Addr)) {
1677 } else if (getBaseWithOffsetUsingSplitOR(*CurDAG, Addr, N0, N1)) {
1725 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
1726 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32);
1728 SDNode *N0Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
1730 SDNode *N0Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
1738 SDVTList VTs = CurDAG->getVTList(MVT::i32, MVT::i1);
1739 SDValue Clamp = CurDAG->getTargetConstant(0, DL, MVT::i1);
1742 CurDAG->getMachineNode(AMDGPU::V_ADD_I32_e64, DL, VTs,
1745 SDNode *Addc = CurDAG->getMachineNode(
1750 CurDAG->getTargetConstant(AMDGPU::VReg_64RegClassID, DL, MVT::i32),
1753 Addr = SDValue(CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, DL,
1761 Offset = CurDAG->getTargetConstant(OffsetVal, SDLoc(), MVT::i16);
1762 SLC = CurDAG->getTargetConstant(0, SDLoc(), MVT::i1);
1808 Offset = CurDAG->getTargetConstant(*EncodedOffset, SL, MVT::i32);
1819 Offset = CurDAG->getTargetConstant(*EncodedOffset, SL, MVT::i32);
1826 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32);
1828 CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, C32Bit), 0);
1840 const MachineFunction &MF = CurDAG->getMachineFunction();
1843 SDValue AddrHi = CurDAG->getTargetConstant(AddrHiVal, SL, MVT::i32);
1846 CurDAG->getTargetConstant(AMDGPU::SReg_64_XEXECRegClassID, SL, MVT::i32),
1848 CurDAG->getTargetConstant(AMDGPU::sub0, SL, MVT::i32),
1849 SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, AddrHi),
1851 CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32),
1854 return SDValue(CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, SL, MVT::i64,
1868 if (CurDAG->isBaseWithConstantOffset(Addr) ||
1872 } else if (getBaseWithOffsetUsingSplitOR(*CurDAG, Addr, N0, N1)) {
1883 Offset = CurDAG->getTargetConstant(0, SL, MVT::i32);
1919 Offset = CurDAG->getTargetConstant(*Imm, SDLoc(Addr), MVT::i32);
1934 Offset = CurDAG->getTargetConstant(*Imm, SDLoc(Addr), MVT::i32);
1947 if (CurDAG->isBaseWithConstantOffset(Index)) {
1956 if (C1->getSExtValue() <= 0 || CurDAG->SignBitIsZero(N0) ||
1959 Offset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i32);
1968 Offset = CurDAG->getTargetConstant(0, DL, MVT::i32);
1979 SDValue PackedConst = CurDAG->getTargetConstant(PackedVal, DL, MVT::i32);
1981 return CurDAG->getMachineNode(Opcode, DL, MVT::i32, Val, PackedConst);
2115 CurDAG->SelectNodeTo(N, AMDGPU::SI_BR_UNDEF, MVT::Other,
2142 Cond = SDValue(CurDAG->getMachineNode(ST->isWave32() ? AMDGPU::S_AND_B32
2145 CurDAG->getRegister(ST->isWave32() ? AMDGPU::EXEC_LO
2152 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, CondReg, Cond);
2153 CurDAG->SelectNodeTo(N, BrOp, MVT::Other,
2187 SDValue Zero = CurDAG->getTargetConstant(0, SDLoc(), MVT::i32);
2189 CurDAG->getTargetConstant(Src0Mods, SDLoc(), MVT::i32), Src0,
2190 CurDAG->getTargetConstant(Src1Mods, SDLoc(), MVT::i32), Src1,
2191 CurDAG->getTargetConstant(Src2Mods, SDLoc(), MVT::i32), Src2,
2192 CurDAG->getTargetConstant(0, SDLoc(), MVT::i1),
2196 CurDAG->SelectNodeTo(N,
2233 CmpSwap = CurDAG->getMachineNode(Opcode, SL, Mem->getVTList(), Ops);
2248 CmpSwap = CurDAG->getMachineNode(Opcode, SL, Mem->getVTList(), Ops);
2258 CurDAG->setNodeMemRefs(CmpSwap, {MMO});
2262 = CurDAG->getTargetExtractSubreg(SubReg, SL, VT, SDValue(CmpSwap, 0));
2266 CurDAG->RemoveDeadNode(N);
2282 if (CurDAG->isBaseWithConstantOffset(Ptr)) {
2289 Offset = CurDAG->getTargetConstant(OffsetVal, SDLoc(), MVT::i32);
2295 Offset = CurDAG->getTargetConstant(0, SDLoc(), MVT::i32);
2300 CurDAG->getTargetConstant(IsGDS, SDLoc(), MVT::i32),
2305 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2306 CurDAG->setNodeMemRefs(cast<MachineSDNode>(Selected), {MMO});
2357 glueCopyToM0(N, CurDAG->getTargetConstant(0, SL, MVT::i32));
2360 if (CurDAG->isBaseWithConstantOffset(BaseOffset)) {
2369 = CurDAG->getMachineNode(AMDGPU::V_READFIRSTLANE_B32, SL, MVT::i32,
2373 = CurDAG->getMachineNode(AMDGPU::S_LSHL_B32, SL, MVT::i32,
2375 CurDAG->getTargetConstant(16, SL, MVT::i32));
2380 SDValue OffsetField = CurDAG->getTargetConstant(ImmOffset, SL, MVT::i32);
2383 SDValue GDS = CurDAG->getTargetConstant(1, SL, MVT::i1);
2393 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2394 CurDAG->setNodeMemRefs(cast<MachineSDNode>(Selected), {MMO});
2425 SDValue ToM0 = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL, AMDGPU::M0,
2428 SDVTList VTs = CurDAG->getVTList(MVT::f32, MVT::Other);
2431 CurDAG->getMachineNode(AMDGPU::V_INTERP_MOV_F32, DL, VTs, {
2432 CurDAG->getTargetConstant(2, DL, MVT::i32), // P0
2439 CurDAG->getMachineNode(AMDGPU::V_INTERP_P1LV_F16, DL, MVT::f32, {
2440 CurDAG->getTargetConstant(0, DL, MVT::i32), // $src0_modifiers
2444 CurDAG->getTargetConstant(0, DL, MVT::i32), // $src2_modifiers
2447 CurDAG->getTargetConstant(0, DL, MVT::i1), // $clamp
2448 CurDAG->getTargetConstant(0, DL, MVT::i32), // $omod
2452 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), SDValue(InterpP1LV, 0));
2492 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), {Src});
2535 SrcMods = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
2560 Clamp = CurDAG->getTargetConstant(0, DL, MVT::i1);
2561 Omod = CurDAG->getTargetConstant(0, DL, MVT::i1);
2571 Clamp = CurDAG->getTargetConstant(0, DL, MVT::i1);
2572 Omod = CurDAG->getTargetConstant(0, DL, MVT::i1);
2617 SrcMods = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
2627 SrcMods = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
2635 SrcMods = CurDAG->getTargetConstant(0, SDLoc(In), MVT::i32);
2692 SrcMods = CurDAG->getTargetConstant(Mods, SDLoc(In), MVT::i32);
2698 return CurDAG->getUNDEF(MVT::i32);
2702 return CurDAG->getConstant(C->getZExtValue() << 16, SL, MVT::i32);
2707 return CurDAG->getConstant(
2719 assert(CurDAG->getTarget().getTargetTriple().getArch() == Triple::amdgcn);
2799 SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_begin();
2800 while (Position != CurDAG->allnodes_end()) {
2806 SDNode *ResNode = Lowering.PostISelFolding(MachineNode, *CurDAG);
2813 CurDAG->RemoveDeadNodes();
2835 IntPtr = CurDAG->getIntPtrConstant(Cst->getZExtValue() / 4, SDLoc(Addr),
2846 Offset = CurDAG->getIntPtrConstant(0, SDLoc(Addr), true);
2895 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32);
2896 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
2899 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32);
2900 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
2904 Offset = CurDAG->getTargetConstant(C->getZExtValue(), DL, MVT::i32);
2907 Offset = CurDAG->getTargetConstant(0, DL, MVT::i32);
2922 Offset = CurDAG->getTargetConstant(IMMOffset->getZExtValue(), SDLoc(Addr),
2928 Base = CurDAG->getCopyFromReg(CurDAG->getEntryNode(),
2929 SDLoc(CurDAG->getEntryNode()),
2931 Offset = CurDAG->getTargetConstant(IMMOffset->getZExtValue(), SDLoc(Addr),
2938 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i32);