Lines Matching refs:CreateReg
1827 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx,
1854 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount,
3471 Operands.push_back(AArch64Operand::CreateReg(
3490 Operands.push_back(AArch64Operand::CreateReg(
3507 Operands.push_back(AArch64Operand::CreateReg(
3522 Operands.push_back(AArch64Operand::CreateReg(
4614 Operands[2] = AArch64Operand::CreateReg(
4777 Operands[2] = AArch64Operand::CreateReg(Reg, RegKind::Scalar,
4793 Operands[2] = AArch64Operand::CreateReg(Reg, RegKind::Scalar,
4810 Operands[1] = AArch64Operand::CreateReg(Reg, RegKind::Scalar,
5726 Operands.push_back(AArch64Operand::CreateReg(Pair, RegKind::Scalar, S,