Lines Matching refs:Instr
1089 static bool UpdateOperandRegClass(MachineInstr &Instr) {
1090 MachineBasicBlock *MBB = Instr.getParent();
1098 for (unsigned OpIdx = 0, EndIdx = Instr.getNumOperands(); OpIdx < EndIdx;
1100 MachineOperand &MO = Instr.getOperand(OpIdx);
1102 Instr.getRegClassConstraint(OpIdx, TII, TRI);
1201 for (const MachineInstr &Instr :
1204 Instr.modifiesRegister(AArch64::NZCV, TRI)) ||
1205 ((AccessToCheck & AK_Read) && Instr.readsRegister(AArch64::NZCV, TRI)))
1263 /// Get opcode of S version of Instr.
1264 /// If Instr is S version its opcode is returned.
1265 /// AArch64::INSTRUCTION_LIST_END is returned if Instr does not have S version
1267 static unsigned sForm(MachineInstr &Instr) {
1268 switch (Instr.getOpcode()) {
1280 return Instr.getOpcode();
1345 static AArch64CC::CondCode findCondCodeUsedByInstr(const MachineInstr &Instr) {
1346 switch (Instr.getOpcode()) {
1351 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV);
1353 return static_cast<AArch64CC::CondCode>(Instr.getOperand(Idx - 2).getImm());
1366 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV);
1368 return static_cast<AArch64CC::CondCode>(Instr.getOperand(Idx - 1).getImm());
1459 for (const MachineInstr &Instr :
1462 if (Instr.readsRegister(AArch64::NZCV, TRI)) {
1463 AArch64CC::CondCode CC = findCondCodeUsedByInstr(Instr);
1469 if (Instr.modifiesRegister(AArch64::NZCV, TRI))