Lines Matching refs:f16
146 addRegisterClass(MVT::f16, &AArch64::FPR16RegClass);
251 setOperationAction(ISD::SETCC, MVT::f16, Custom);
254 setOperationAction(ISD::STRICT_FSETCC, MVT::f16, Custom);
257 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom);
265 setOperationAction(ISD::BR_CC, MVT::f16, Custom);
270 setOperationAction(ISD::SELECT, MVT::f16, Custom);
275 setOperationAction(ISD::SELECT_CC, MVT::f16, Custom);
440 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Custom);
442 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote);
444 setOperationAction(ISD::FREM, MVT::f16, Promote);
447 setOperationAction(ISD::FPOW, MVT::f16, Promote);
450 setOperationAction(ISD::FPOWI, MVT::f16, Promote);
453 setOperationAction(ISD::FCOS, MVT::f16, Promote);
456 setOperationAction(ISD::FSIN, MVT::f16, Promote);
459 setOperationAction(ISD::FSINCOS, MVT::f16, Promote);
462 setOperationAction(ISD::FEXP, MVT::f16, Promote);
465 setOperationAction(ISD::FEXP2, MVT::f16, Promote);
468 setOperationAction(ISD::FLOG, MVT::f16, Promote);
471 setOperationAction(ISD::FLOG2, MVT::f16, Promote);
474 setOperationAction(ISD::FLOG10, MVT::f16, Promote);
479 setOperationAction(ISD::SELECT, MVT::f16, Promote);
480 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote);
481 setOperationAction(ISD::SETCC, MVT::f16, Promote);
482 setOperationAction(ISD::BR_CC, MVT::f16, Promote);
483 setOperationAction(ISD::FADD, MVT::f16, Promote);
484 setOperationAction(ISD::FSUB, MVT::f16, Promote);
485 setOperationAction(ISD::FMUL, MVT::f16, Promote);
486 setOperationAction(ISD::FDIV, MVT::f16, Promote);
487 setOperationAction(ISD::FMA, MVT::f16, Promote);
488 setOperationAction(ISD::FNEG, MVT::f16, Promote);
489 setOperationAction(ISD::FABS, MVT::f16, Promote);
490 setOperationAction(ISD::FCEIL, MVT::f16, Promote);
491 setOperationAction(ISD::FSQRT, MVT::f16, Promote);
492 setOperationAction(ISD::FFLOOR, MVT::f16, Promote);
493 setOperationAction(ISD::FNEARBYINT, MVT::f16, Promote);
494 setOperationAction(ISD::FRINT, MVT::f16, Promote);
495 setOperationAction(ISD::FROUND, MVT::f16, Promote);
496 setOperationAction(ISD::FTRUNC, MVT::f16, Promote);
497 setOperationAction(ISD::FMINNUM, MVT::f16, Promote);
498 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote);
499 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
500 setOperationAction(ISD::FMAXIMUM, MVT::f16, Promote);
569 setOperationAction(ISD::FNEARBYINT, MVT::f16, Legal);
570 setOperationAction(ISD::FFLOOR, MVT::f16, Legal);
571 setOperationAction(ISD::FCEIL, MVT::f16, Legal);
572 setOperationAction(ISD::FRINT, MVT::f16, Legal);
573 setOperationAction(ISD::FTRUNC, MVT::f16, Legal);
574 setOperationAction(ISD::FROUND, MVT::f16, Legal);
575 setOperationAction(ISD::FMINNUM, MVT::f16, Legal);
576 setOperationAction(ISD::FMAXNUM, MVT::f16, Legal);
577 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal);
578 setOperationAction(ISD::FMAXIMUM, MVT::f16, Legal);
637 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
645 setTruncStoreAction(MVT::f32, MVT::f16, Expand);
647 setTruncStoreAction(MVT::f64, MVT::f16, Expand);
651 setTruncStoreAction(MVT::f128, MVT::f16, Expand);
654 setOperationAction(ISD::BITCAST, MVT::f16, Custom);
666 setIndexedLoadAction(im, MVT::f16, Legal);
674 setIndexedStoreAction(im, MVT::f16, Legal);
810 // Or, direct i32 -> f16 vector conversion. Set it so custom, so the
1049 (VT.getVectorElementType() != MVT::f16 || Subtarget->hasFullFP16()))
1892 assert(VT != MVT::f16 && "Lowering of strict fp16 not yet implemented");
1906 if (VT == MVT::f16 && !FullFP16) {
2015 if (LHS.getValueType() == MVT::f16 && !FullFP16) {
2756 // f16 conversions are promoted to f32 when full fp16 is not supported.
2757 if (InVT.getVectorElementType() == MVT::f16 &&
2795 // f16 conversions are promoted to f32 when full fp16 is not supported.
2796 if (SrcVal.getValueType() == MVT::f16 && !Subtarget->hasFullFP16()) {
2855 // f16 conversions are promoted to f32 when full fp16 is not supported.
2856 if (Op.getValueType() == MVT::f16 &&
2861 ISD::FP_ROUND, dl, MVT::f16,
2921 if (OpVT != MVT::f16 && OpVT != MVT::bf16)
3617 case MVT::f16:
3759 else if (RegVT == MVT::f16 || RegVT == MVT::bf16)
5476 assert(LHS.getValueType() == MVT::f16 || LHS.getValueType() == MVT::bf16 ||
5539 } else if (VT == MVT::f16 || VT == MVT::v4f16 || VT == MVT::v8f16) {
5560 if (VT == MVT::f16)
5685 assert(LHS.getValueType() == MVT::f16 || LHS.getValueType() == MVT::f32 ||
5742 // Also handle f16, for which we need to do a f32 comparison.
5743 if (LHS.getValueType() == MVT::f16 && !Subtarget->hasFullFP16()) {
5869 assert(LHS.getValueType() == MVT::f16 || LHS.getValueType() == MVT::f32 ||
6439 else if (VT == MVT::f16 && Subtarget->hasFullFP16())
7514 VT.getVectorElementType() == MVT::f16 ||
7528 else if (EltTy == MVT::i16 || EltTy == MVT::f16 || EltTy == MVT::bf16)
7635 if (EltType == MVT::i16 || EltType == MVT::f16 || EltType == MVT::bf16)
7870 case MVT::f16:
8560 assert ((EltTy == MVT::f16 || EltTy == MVT::bf16 || EltTy == MVT::f32 ||
9135 if (!FullFP16 && LHS.getValueType().getVectorElementType() == MVT::f16) {
9146 assert((!FullFP16 && LHS.getValueType().getVectorElementType() != MVT::f16) ||
14288 (Op.getValueType() != MVT::f16 && Op.getValueType() != MVT::bf16))
14977 case MVT::f16:
15038 case MVT::f16: