Target/AArch64/AArch64FrameLowering.cpp

296   const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
307       RegInfo->needsStackRealignment(MF))
580   const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
583   if (!RegInfo->needsStackRealignment(*MF))
612   const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
625   if (RegInfo->needsStackRealignment(MF))
688   const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
697     unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
698     unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg());
718                 .addImm(RegInfo->getSEHRegNum(Reg0))
719                 .addImm(RegInfo->getSEHRegNum(Reg1))
728     unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
739     unsigned Reg =  RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
748     unsigned Reg0 =  RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
749     unsigned Reg1 =  RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
767                 .addImm(RegInfo->getSEHRegNum(Reg0))
768                 .addImm(RegInfo->getSEHRegNum(Reg1))
775     int Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
784     unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
1055   const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
1327         !IsFunclet && RegInfo->needsStackRealignment(MF);
1381   if (!IsFunclet && RegInfo->hasBasePointer(MF)) {
1382     TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP,
1416     Register FramePtr = RegInfo->getFrameRegister(MF);
1485       unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true);
1857   const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
1860   return RegInfo->getLocalAddressRegister(MF) == AArch64::FP
1880   const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
1908     } else if (isCSR && RegInfo->needsStackRealignment(MF)) {
1914     } else if (hasFP(MF) && !RegInfo->needsStackRealignment(MF)) {
1926         bool CanUseBP = RegInfo->hasBasePointer(MF);
1939       } else if (MF.hasEHFunclets() && !RegInfo->hasBasePointer(MF)) {
1956   assert(((isFixed || isCSR) || !RegInfo->needsStackRealignment(MF) || !UseFP) &&
1971          RegInfo->needsStackRealignment(MF))) {
1972       FrameReg = RegInfo->getFrameRegister(MF);
1976     FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister()
1988     FrameReg = RegInfo->getFrameRegister(MF);
1993   if (RegInfo->hasBasePointer(MF))
1994     FrameReg = RegInfo->getBaseRegister();
2510   const AArch64RegisterInfo *RegInfo = static_cast<const AArch64RegisterInfo *>(
2520   unsigned BasePointerReg = RegInfo->hasBasePointer(MF)
2521                                 ? RegInfo->getBaseRegister()
2542           !RegInfo->isReservedReg(MF, Reg)) {
2556           !RegInfo->isReservedReg(MF, PairedReg))
2599              << ' ' << printReg(Reg, RegInfo);
2614   if (BigStack || !CanEliminateFrame || RegInfo->cannotEliminateFrame(MF))
2625       LLVM_DEBUG(dbgs() << "Spilling " << printReg(UnspilledCSGPR, RegInfo)