Lines Matching defs:emitIntExt
233 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1208 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt);
1306 RHSReg = emitIntExt(SrcVT, RHSReg, RetVT, IsZExt);
2403 SrcReg = emitIntExt(VT, SrcReg, MVT::i32, /*isZExt=*/true);
2924 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed);
3092 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
3102 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
3921 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
4138 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4245 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4283 Op0 = emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4328 Op0Reg = emitIntExt(RetVT, Op0Reg, MVT::i32, /*isZExt=*/false);
4366 return emitIntExt(SrcVT, Op0, RetVT, IsZExt);
4421 unsigned AArch64FastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
4630 unsigned ResultReg = emitIntExt(SrcVT, SrcReg, RetVT, IsZExt);
5008 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false);