Lines Matching refs:DefMI
185 const MachineInstr *DefMI, unsigned DefOperIdx,
189 return TII->defaultDefLatency(SchedModel, *DefMI);
194 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx,
198 unsigned DefClass = DefMI->getDesc().getSchedClass();
205 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI);
213 std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI));
217 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);
218 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);
241 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit()
242 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()
245 << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)";
252 return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, *DefMI);
290 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
303 Register Reg = DefMI->getOperand(DefOperIdx).getReg();
304 const MachineFunction &MF = *DefMI->getMF();
307 return computeInstrLatency(DefMI);
312 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);