Lines Matching refs:isVector
225 if (VT.isVector() || VT.isFloatingPoint()) {
531 APInt DemandedElts = VT.isVector()
552 if (Op.getValueType().isVector())
615 APInt DemandedElts = VT.isVector()
658 if (SrcVT.isVector() && (NumDstEltBits % NumSrcEltBits) == 0 &&
684 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
860 APInt DemandedElts = VT.isVector()
900 assert((!Op.getValueType().isVector() ||
1767 if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
1835 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1868 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
1916 unsigned InElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
2057 if (!TLO.LegalOperations() && !VT.isVector() && !SrcVT.isVector() &&
2082 if (SrcVT.isVector() && (BitWidth % NumSrcEltBits) == 0 &&
2111 unsigned NumSrcElts = SrcVT.isVector() ? SrcVT.getVectorNumElements() : 1;
2121 if (SrcVT.isVector()) {
2265 assert(DAG.getTargetLoweringInfo().isBinOp(BO.getOpcode()) && VT.isVector() &&
2315 assert(VT.isVector() && "Expected vector op");
2379 if (!SrcVT.isVector())
3810 if (!VT.isVector()) { // TODO: Support this for vectors.
3831 if (!VT.isVector()) { // TODO: Support this for vectors.
3850 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
3868 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
3892 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) {
4890 if (VT.isVector()) {
4985 if (VT.isVector()) {
5103 if (VT.isVector()) {
5145 if (VT.isVector())
5343 if (VT.isVector()) {
5398 assert(VT.isVector() && "Can/should only get here for vectors.");
5587 if (VT.isVector()) {
5652 assert(VT.isVector() && "Can/should only get here for vectors.");
6017 if (!VT.isVector() && Opcode == ISD::MUL && LHSSB > InnerBitSize &&
6155 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SHL, VT) ||
6236 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SHL, VT) ||
6346 if (DstVT.isVector() && (!isOperationLegalOrCustom(SIntOpcode, DstVT) ||
6438 if (SrcVT.isVector() && (!isOperationLegalOrCustom(ISD::SRL, SrcVT) ||
6554 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::ADD, VT) ||
6628 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) ||
6680 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) ||
6716 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SRA, VT) ||
6901 if (VT.isFloatingPoint() || VT.isVector()) {
6905 LoadedVT.isVector()) {
6987 assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
7055 if (StoreMemVT.isFloatingPoint() || StoreMemVT.isVector()) {
7059 StoreMemVT.isVector()) {
7136 assert(StoreMemVT.isInteger() && !StoreMemVT.isVector() &&
7457 } else if (VT.isVector()) {
7713 if (VT.isVector())
7739 if (VT.isVector())