• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/

Lines Matching defs:TargetLowering

1 //===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
9 // This implements the TargetLowering class.
13 #include "llvm/CodeGen/TargetLowering.h"
38 TargetLowering::TargetLowering(const TargetMachine &tm)
41 const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
45 bool TargetLowering::isPositionIndependent() const {
51 bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
78 bool TargetLowering::parametersInCSRMatch(const MachineRegisterInfo &MRI,
130 TargetLowering::makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT,
138 TargetLowering::ArgListTy Args;
141 TargetLowering::ArgListEntry Entry;
163 TargetLowering::CallLoweringInfo CLI(DAG);
183 bool TargetLowering::findOptimalMemOpLowering(
275 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
285 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
390 TargetLowering::MakeLibCallOptions CallOptions;
427 unsigned TargetLowering::getJumpTableEncoding() const {
440 SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
455 TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
462 TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
486 bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
527 bool TargetLowering::ShrinkDemandedConstant(SDValue Op,
540 bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned BitWidth,
562 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
584 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
599 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
624 SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
856 SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
867 SDValue TargetLowering::SimplifyMultipleUseDemandedVectorElts(
882 bool TargetLowering::SimplifyDemandedBits(
1424 TargetLowering::ZeroOrOneBooleanContent &&
2240 bool TargetLowering::SimplifyDemandedVectorElts(SDValue Op,
2307 bool TargetLowering::SimplifyDemandedVectorElts(
2872 void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
2886 void TargetLowering::computeKnownBitsForTargetInstr(
2893 void TargetLowering::computeKnownBitsForFrameIndex(
2899 Align TargetLowering::computeKnownAlignForTargetInstr(
2907 unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
2920 unsigned TargetLowering::computeNumSignBitsForTargetInstr(
2926 bool TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
2938 bool TargetLowering::SimplifyDemandedBitsForTargetNode(
2951 SDValue TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
2965 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0,
2981 const Constant *TargetLowering::getTargetConstantFromLoad(LoadSDNode*) const {
2985 bool TargetLowering::isKnownNeverNaNForTargetNode(SDValue Op,
3001 bool TargetLowering::isConstTrueVal(const SDNode *N) const {
3035 bool TargetLowering::isConstFalseVal(const SDNode *N) const {
3059 bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT,
3064 TargetLowering::BooleanContent Cnt = getBooleanContents(VT);
3066 case TargetLowering::ZeroOrOneBooleanContent:
3070 case TargetLowering::UndefinedBooleanContent:
3071 case TargetLowering::ZeroOrNegativeOneBooleanContent:
3079 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
3148 SDValue TargetLowering::optimizeSetCCOfSignedTruncationCheck(
3237 SDValue TargetLowering::optimizeSetCCByHoistingAndByConstFromLogicalShift(
3250 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3310 SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1,
3352 SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
3914 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4220 bool TargetLowering::isGAPlusOffset(SDNode *WN, const GlobalValue *&GA,
4250 SDValue TargetLowering::PerformDAGCombine(SDNode *N,
4260 TargetLowering::ConstraintType
4261 TargetLowering::getConstraintType(StringRef Constraint) const {
4306 const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const {
4314 SDValue TargetLowering::LowerAsmOutputForConstraint(
4322 void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
4402 TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *RI,
4447 bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
4454 unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
4464 TargetLowering::AsmOperandInfoVector
4465 TargetLowering::ParseConstraints(const DataLayout &DL,
4649 static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
4651 case TargetLowering::C_Immediate:
4652 case TargetLowering::C_Other:
4653 case TargetLowering::C_Unknown:
4655 case TargetLowering::C_Register:
4657 case TargetLowering::C_RegisterClass:
4659 case TargetLowering::C_Memory:
4668 TargetLowering::ConstraintWeight
4669 TargetLowering::getMultipleConstraintMatchWeight(
4692 TargetLowering::ConstraintWeight
4693 TargetLowering::getSingleConstraintMatchWeight(
4758 static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
4759 const TargetLowering &TLI,
4763 TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
4768 TargetLowering::ConstraintType CType =
4772 if (OpInfo.isIndirect && !(CType == TargetLowering::C_Memory ||
4773 CType == TargetLowering::C_Register ||
4774 CType == TargetLowering::C_RegisterClass))
4781 if ((CType == TargetLowering::C_Other ||
4782 CType == TargetLowering::C_Immediate) && Op.getNode()) {
4797 if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
4815 void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
4853 static SDValue BuildExactSDIV(const TargetLowering &TLI, SDNode *N,
4912 SDValue TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
4916 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4926 SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
5035 SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
5197 SDValue TargetLowering::buildUREMEqFold(EVT SETCCVT, SDValue REMNode,
5214 TargetLowering::prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
5431 SDValue TargetLowering::buildSREMEqFold(EVT SETCCVT, SDValue REMNode,
5449 TargetLowering::prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
5689 bool TargetLowering::
5700 SDValue TargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
5944 bool TargetLowering::expandMUL_LOHI(unsigned Opcode, EVT VT, SDLoc dl,
6127 bool TargetLowering::expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
6151 bool TargetLowering::expandFunnelShift(SDNode *Node, SDValue &Result,
6213 bool TargetLowering::expandROT(SDNode *Node, SDValue &Result,
6258 bool TargetLowering::expandFP_TO_SINT(SDNode *Node, SDValue &Result,
6329 bool TargetLowering::expandFP_TO_UINT(SDNode *Node, SDValue &Result,
6426 bool TargetLowering::expandUINT_TO_FP(SDNode *Node, SDValue &Result,
6480 SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node,
6540 bool TargetLowering::expandCTPOP(SDNode *Node, SDValue &Result,
6600 bool TargetLowering::expandCTLZ(SDNode *Node, SDValue &Result,
6653 bool TargetLowering::expandCTTZ(SDNode *Node, SDValue &Result,
6708 bool TargetLowering::expandABS(SDNode *N, SDValue &Result,
6730 TargetLowering::scalarizeVectorLoad(LoadSDNode *LD,
6817 SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST,
6891 TargetLowering::expandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG) const {
7042 SDValue TargetLowering::expandUnalignedStore(StoreSDNode *ST,
7169 TargetLowering::IncrementMemoryAddress(SDValue Addr, SDValue Mask,
7220 SDValue TargetLowering::getVectorElementPointer(SelectionDAG &DAG,
7247 SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
7268 TargetLowering::CallLoweringInfo CLI(DAG);
7284 SDValue TargetLowering::lowerCmpEqZeroToCtlzSrl(SDValue Op,
7309 SDValue TargetLowering::expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const {
7390 TargetLowering::expandFixedPointMul(SDNode *Node, SelectionDAG &DAG) const {
7530 TargetLowering::expandFixedPointDiv(unsigned Opcode, const SDLoc &dl,
7616 void TargetLowering::expandUADDSUBO(
7645 void TargetLowering::expandSADDSUBO(
7685 bool TargetLowering::expandMULO(SDNode *Node, SDValue &Result,
7781 TargetLowering::MakeLibCallOptions CallOptions;
7829 SDValue TargetLowering::expandVecReduce(SDNode *Node, SelectionDAG &DAG) const {
7887 bool TargetLowering::expandREM(SDNode *Node, SDValue &Result,