Lines Matching defs:Val
189 if (SDValue Val = TLI.joinRegisterPartsIntoValue(DAG, DL, Parts, NumParts,
191 return Val;
198 SDValue Val = Parts[0];
229 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
239 Lo = Val;
249 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
260 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
266 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, CC);
270 // There is now one part, held in Val. Correct it to match ValueVT.
273 EVT PartEVT = Val.getValueType();
276 return Val;
283 Val = DAG.getNode(ISD::TRUNCATE, DL, PartEVT, Val);
288 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
297 Val = DAG.getNode(*AssertOp, DL, PartEVT, Val,
299 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
301 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
306 if (ValueVT.bitsLT(Val.getValueType()))
308 ISD::FP_ROUND, DL, ValueVT, Val,
311 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
318 Val = DAG.getNode(ISD::BITCAST, DL, MVT::i64, Val);
319 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
353 SDValue Val = Parts[0];
408 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS
413 // There is now one part, held in Val. Correct it to match ValueVT.
414 EVT PartEVT = Val.getValueType();
417 return Val;
430 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
436 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
441 return DAG.getAnyExtOrTrunc(Val, DL, ValueVT);
449 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
455 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
457 // Bitcast Val back the original type and extract the corresponding
462 Val = DAG.getBitcast(WiderVecType, Val);
463 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
476 Val = DAG.getNode(ISD::BITCAST, DL, ValueSVT, Val);
478 Val = ValueVT.isFloatingPoint()
479 ? DAG.getFPExtendOrRound(Val, DL, ValueSVT)
480 : DAG.getAnyExtOrTrunc(Val, DL, ValueSVT);
483 return DAG.getBuildVector(ValueVT, DL, Val);
487 SDValue Val, SDValue *Parts, unsigned NumParts,
492 /// split into legal parts. If the parts contain more bits than Val, then, for
494 static void getCopyToParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val,
501 if (TLI.splitValueIntoRegisterParts(DAG, DL, Val, Parts, NumParts, PartVT,
504 EVT ValueVT = Val.getValueType();
508 return getCopyToPartsVector(DAG, DL, Val, Parts, NumParts, PartVT, V,
523 Parts[0] = Val;
531 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
537 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
543 Val = DAG.getNode(ExtendKind, DL, ValueVT, Val);
545 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
550 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
557 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
559 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
563 ValueVT = Val.getValueType();
571 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
574 Parts[0] = Val;
586 SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val,
598 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
606 Val);
632 SDValue Val, const SDLoc &DL, EVT PartVT) {
636 EVT ValueVT = Val.getValueType();
645 DAG.ExtractVectorElements(Val, Ops);
660 SDValue Val, SDValue *Parts, unsigned NumParts,
663 EVT ValueVT = Val.getValueType();
674 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
675 } else if (SDValue Widened = widenVectorToPartType(DAG, Val, DL, PartVT)) {
676 Val = Widened;
684 Val = DAG.getAnyExtOrTrunc(Val, DL, PartVT);
687 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, PartVT, Val,
694 Val = DAG.getBitcast(IntermediateType, Val);
695 Val = DAG.getAnyExtOrTrunc(Val, DL, PartVT);
699 assert(Val.getValueType() == PartVT && "Unexpected vector part value type");
700 Parts[0] = Val;
736 if (SDValue Widened = widenVectorToPartType(DAG, Val, DL, BuiltVectorTy))
737 Val = Widened;
739 Val = DAG.getNode(ISD::BITCAST, DL, BuiltVectorTy, Val);
750 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
753 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntermediateVT, Val,
893 void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
911 if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
914 getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part],
1188 SDValue Val) {
1198 unsigned ValSDNodeOrder = Val.getNode()->getIROrder();
1205 if (Val.getNode()) {
1212 if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, false, Val)) {
1215 LLVM_DEBUG(dbgs() << " By mapping to:\n "; Val.dump());
1217 // inserted after the definition of Val when emitting the instructions
1223 SDV = getDbgValue(Val, Variable, Expr, dl,
1225 DAG.AddDbgValue(SDV, Val.getNode(), false);
1431 SDValue Val = getValueImpl(V);
1432 NodeMap[V] = Val;
1433 resolveDanglingDebugInfo(V, Val);
1434 return Val;
1454 SDValue Val = getValueImpl(V);
1455 NodeMap[V] = Val;
1456 resolveDanglingDebugInfo(V, Val);
1457 return Val;
1500 SDNode *Val = getValue(*OI).getNode();
1502 if (!Val) continue;
1505 for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i)
1506 Constants.push_back(SDValue(Val, i));
1516 SDNode *Val = getValue(CDS->getElementAsConstant(i)).getNode();
1519 for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i)
1520 Ops.push_back(SDValue(Val, i));
1842 SDValue Val = RetOp.getValue(RetOp.getResNo() + i);
1844 Val = DAG.getPtrExtOrTrunc(Val, getCurSDLoc(), MemVTs[i]);
1846 Chain, getCurSDLoc(), Val,
3688 SDValue Val = getValue(Op1);
3691 SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex);
4174 SDValue Val = SDValue(Src.getNode(), Src.getResNo() + i);
4176 Val = DAG.getPtrExtOrTrunc(Val, dl, MemVTs[i]);
4178 DAG.getStore(Root, dl, Val, Add, MachinePointerInfo(PtrV, Offsets[i]),
4619 SDValue Val = getValue(I.getValueOperand());
4620 if (Val.getValueType() != MemVT)
4621 Val = DAG.getPtrExtOrTrunc(Val, dl, MemVT);
4627 SDValue S = DAG.getStore(InChain, dl, Val, Ptr, MMO);
4632 Ptr, Val, MMO);
5233 unsigned Val = RHSC->getSExtValue();
5234 if ((int)Val < 0) Val = -Val;
5237 if (Val == 0)
5244 countPopulation(Val) + Log2_32(Val) < 7) {
5253 while (Val) {
5254 if (Val & 1) {
5263 Val >>= 1;
5814 SDValue Val = getValue(MI.getValue());
5821 SDValue MC = DAG.getAtomicMemset(getRoot(), sdl, Dst, DstAlign, Val, Length,
6841 SDValue Val = getValue(I.getArgOperand(Op + 1));
6842 auto *GA = dyn_cast<GlobalAddressSDNode>(Val);
6848 Val.getValueType(), GA->getOffset())});
6880 SDValue Val = TSI.EmitTargetCodeForSetTag(
6884 DAG.setRoot(Val);
6885 setValue(&I, Val);
8504 SDValue Val;
8512 Val = OpInfo.AssignedRegs.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(),
8517 Val = TLI.LowerAsmOutputForConstraint(Chain, Flag, getCurSDLoc(),
8530 SDValue Store = DAG.getStore(Chain, getCurSDLoc(), Val, getValue(Ptr),
8536 if (Val.getOpcode() == ISD::MERGE_VALUES) {
8537 for (const SDValue &V : Val->op_values())
8540 handleRegAssign(Val);
9546 const Value *Val = SI->getValueOperand()->stripPointerCasts();
9547 const auto *Arg = dyn_cast<Argument>(Val);
9889 for (unsigned Val = 0; Val != NumValues; ++Val) {
9890 EVT VT = ValueVTs[Val];