Lines Matching defs:Op1IsKill
625 bool Op1IsKill = hasTrivialKill(I->getOperand(1));
628 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill,
674 bool Op1IsKill = hasTrivialKill(I->getOperand(1));
678 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill);
2010 bool /*Op1IsKill*/) {
2129 bool Op1IsKill) {
2139 .addReg(Op1, getKillRegState(Op1IsKill));
2143 .addReg(Op1, getKillRegState(Op1IsKill));
2153 bool Op1IsKill, unsigned Op2,
2165 .addReg(Op1, getKillRegState(Op1IsKill))
2170 .addReg(Op1, getKillRegState(Op1IsKill))
2247 bool Op1IsKill, uint64_t Imm) {
2257 .addReg(Op1, getKillRegState(Op1IsKill))
2262 .addReg(Op1, getKillRegState(Op1IsKill))