Lines Matching refs:SUB
1579 case ISD::SUB: return visitSUB(N);
1735 case ISD::SUB:
2084 assert((N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
2119 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit);
2125 assert((N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
2156 DAG.FoldConstantArithmetic(IsAdd ? ISD::ADD : ISD::SUB, DL, VT,
2204 if (N0.getOpcode() == ISD::SUB &&
2207 DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N1, N0.getOperand(1)});
2213 if (N0.getOpcode() == ISD::SUB &&
2218 return DAG.getNode(ISD::SUB, DL, VT, Add, N0.getOperand(1));
2257 if (N0.getOpcode() == ISD::SUB && isNullOrNullSplat(N0.getOperand(0)))
2258 return DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
2261 if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
2262 return DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(1));
2265 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
2269 if (N0.getOpcode() == ISD::SUB && N1 == N0.getOperand(1))
2273 if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB &&
2275 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2279 if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB &&
2281 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0),
2285 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
2287 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2291 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
2293 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2297 if ((N1.getOpcode() == ISD::SUB || N1.getOpcode() == ISD::ADD) &&
2298 N1.getOperand(0).getOpcode() == ISD::SUB &&
2304 if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB) {
2311 return DAG.getNode(ISD::SUB, DL, VT,
2334 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
2352 return DAG.getNode(ISD::SUB, DL, VT, A, Xor.getOperand(0));
2363 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(1), Not);
2368 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
2521 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, N0, N1.getOperand(0));
2531 if (N1.getOpcode() == ISD::SHL && N1.getOperand(0).getOpcode() == ISD::SUB &&
2533 return DAG.getNode(ISD::SUB, DL, VT, N0,
2549 return DAG.getNode(ISD::SUB, DL, VT, N1, Not);
2554 // This is necessary because SUB(X,C) -> ADD(X,-C) doesn't work for vectors.
2555 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
2558 return DAG.getNode(ISD::SUB, DL, VT, Add, N0.getOperand(1));
2562 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
2564 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
2575 return DAG.getNode(ISD::SUB, DL, VT, N1, ZExt);
2584 return DAG.getNode(ISD::SUB, DL, VT, N0, ZExt);
3072 if (SDValue C = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N0, N1}))
3121 if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
3125 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
3141 DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N0.getOperand(1), N1});
3151 SDValue NewC = DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N0, N11});
3153 return DAG.getNode(ISD::SUB, DL, VT, NewC, N1.getOperand(0));
3158 if (N0.getOpcode() == ISD::SUB &&
3164 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), NewC);
3168 if (N0.getOpcode() == ISD::SUB &&
3172 DAG.FoldConstantArithmetic(ISD::SUB, DL, VT, {N0.getOperand(0), N1});
3174 return DAG.getNode(ISD::SUB, DL, VT, NewC, N0.getOperand(1));
3179 (N0.getOperand(1).getOpcode() == ISD::SUB ||
3192 if (N0.getOpcode() == ISD::SUB && N0.getOperand(1).getOpcode() == ISD::SUB &&
3194 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0),
3198 if (N1.getOpcode() == ISD::SUB && N1.hasOneUse())
3200 DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(1),
3219 if (N1.getOperand(0).getOpcode() == ISD::SUB &&
3226 if (N1.getOperand(1).getOpcode() == ISD::SUB &&
3251 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB && isOneOrOneSplat(N1)) {
3270 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
3276 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(0));
3277 return DAG.getNode(ISD::SUB, DL, VT, Sub, N1.getOperand(1));
3280 // This is necessary because SUB(X,C) -> ADD(X,-C) doesn't work for vectors.
3281 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
3283 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
3284 return DAG.getNode(ISD::SUB, DL, VT, Sub, N0.getOperand(1));
3287 if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
3290 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), Add);
3366 SDValue NegX = DAG.getNode(ISD::SUB, DL, VT, Zero, X);
3416 // If the flag result is dead, turn this into an SUB.
3418 return CombineTo(N, DAG.getNode(ISD::SUB, DL, VT, N0, N1),
3447 // If the flag result is dead, turn this into an SUB.
3449 return CombineTo(N, DAG.getNode(ISD::SUB, DL, VT, N0, N1),
3581 return DAG.getNode(ISD::SUB, DL, VT,
3602 return DAG.getNode(ISD::SUB, DL, VT,
3625 MathOp = ISD::SUB;
3637 R = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), R);
3855 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), N0);
3880 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
3931 SDValue Inexact = DAG.getNode(ISD::SUB, DL, ShiftAmtTy, Bits, C1);
3960 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, Zero, Sra);
4016 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
4146 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
4237 ISD::SUB, DL, VT, DAG.getConstant(NumEltBits, DL, VT), LogBase2);
5482 if (N1C && N1C->isOne() && N0.getOpcode() == ISD::SUB) {
6325 if (Neg.getOpcode() != ISD::SUB)
7393 if (isAllOnesConstant(N1) && N0.getOpcode() == ISD::SUB &&
7402 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
7722 unsigned CombineOp = SameSide ? ISD::ADD : ISD::SUB;
8579 // TODO: when is it worth doing SUB(BW, N2) as well?
9307 N1 == LHS && N2.getOpcode() == ISD::SUB && N1 == N2.getOperand(1))
9310 N2 == LHS && N1.getOpcode() == ISD::SUB && N2 == N1.getOperand(1))
10226 if (N0.getOpcode() == ISD::SUB && N0.hasOneUse() &&
10229 TLI.isOperationLegalOrCustom(ISD::SUB, VT)) {
10231 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Zext);
10777 case ISD::SUB: {
11463 case ISD::SUB:
14223 } else if (N->getOpcode() == ISD::SUB) {
14300 if ((Ptr.getOpcode() != ISD::ADD && Ptr.getOpcode() != ISD::SUB) ||
14374 Use.getUser()->getOpcode() != ISD::SUB) {
14473 X0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 1) ? -1 : 1;
14474 Y0 = (OtherUses[i]->getOpcode() == ISD::SUB && OffsetIdx == 0) ? -1 : 1;
14478 unsigned Opcode = (Y0 * Y1 < 0) ? ISD::SUB : ISD::ADD;
14512 (PtrUse->getOpcode() != ISD::ADD && PtrUse->getOpcode() != ISD::SUB))
14546 if (Use->getOpcode() == ISD::ADD || Use->getOpcode() == ISD::SUB) {
14664 (AM == ISD::PRE_INC || AM == ISD::POST_INC ? ISD::ADD : ISD::SUB);
21504 SDValue LogBase2 = DAG.getNode(ISD::SUB, DL, VT, Base, Ctlz);