Lines Matching defs:N2
535 SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2);
537 SDValue N2, SDValue N3, ISD::CondCode CC,
540 const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3,
543 SDValue N2, SDValue N3, ISD::CondCode CC);
921 SDValue N0, N1, N2;
922 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
8493 SDValue N2 = N->getOperand(2);
8501 N2, APInt(N2.getScalarValueSizeInBits(), BitWidth - 1)))
8509 if (ConstantSDNode *Cst = isConstOrConstSplat(N2)) {
8510 EVT ShAmtTy = N2.getValueType();
8576 // fold fshr(undef_or_zero, N1, N2) -> lshr(N1, N2)
8577 // fold fshl(N0, undef_or_zero, N2) -> shl(N0, N2)
8579 // TODO: when is it worth doing SUB(BW, N2) as well?
8581 APInt ModuloBits(N2.getScalarValueSizeInBits(), BitWidth - 1);
8582 if (IsUndefOrZero(N0) && !IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits))
8583 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N1, N2);
8584 if (IsUndefOrZero(N1) && IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits))
8585 return DAG.getNode(ISD::SHL, SDLoc(N), VT, N0, N2);
8588 // fold (fshl N0, N0, N2) -> (rotl N0, N2)
8589 // fold (fshr N0, N0, N2) -> (rotr N0, N2)
8591 // is legal as well we might be better off avoiding non-constant (BW - N2).
8594 return DAG.getNode(RotOpc, SDLoc(N), VT, N0, N2);
8810 SDValue N2 = N->getOperand(2);
8819 auto *C2 = dyn_cast<ConstantSDNode>(N2);
8866 return DAG.getNode(ISD::ADD, DL, VT, Cond, N2);
8872 return DAG.getNode(ISD::ADD, DL, VT, Cond, N2);
8918 SDValue N2 = N->getOperand(2);
8924 if (SDValue V = DAG.simplifySelect(N0, N1, N2))
8930 return DAG.getNode(ISD::OR, DL, VT, N0, N2);
8939 return DAG.getNode(ISD::AND, DL, VT, NOTNode, N2);
8942 if (VT == VT0 && VT == MVT::i1 && isOneConstant(N2)) {
8949 if (VT == VT0 && VT == MVT::i1 && (N0 == N2 || isNullConstant(N2)))
8953 if (SimplifySelectOps(N, N1, N2))
8973 DAG.getNode(ISD::SELECT, DL, N1.getValueType(), Cond1, N1, N2, Flags);
8976 InnerSelect, N2, Flags);
8986 Cond1, N1, N2, Flags);
9000 if (N1_2 == N2 && N0.getValueType() == N1_0.getValueType()) {
9005 N2, Flags);
9010 N2, Flags);
9015 if (N2->getOpcode() == ISD::SELECT && N2->hasOneUse()) {
9016 SDValue N2_0 = N2->getOperand(0);
9017 SDValue N2_1 = N2->getOperand(1);
9018 SDValue N2_2 = N2->getOperand(2);
9034 // select (not Cond), N1, N2 -> select Cond, N2, N1
9036 SDValue SelectOp = DAG.getSelect(DL, VT, F, N2, N1);
9050 if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(DAG, N1, N2, TLI))
9051 if (SDValue FMinMax = combineMinNumMaxNum(DL, VT, Cond0, Cond1, N1, N2,
9062 N2.getOpcode() == ISD::ADD && Cond0 == N2.getOperand(0)) {
9063 auto *C = dyn_cast<ConstantSDNode>(N2.getOperand(1));
9079 SDValue UAO = DAG.getNode(ISD::UADDO, DL, VTs, Cond0, N2.getOperand(1));
9091 N2, N0.getOperand(2));
9096 return SimplifySelect(DL, N0, N1, N2);
9220 SDValue N2 = N->getOperand(2);
9225 !ISD::isBuildVectorOfConstantSDNodes(N2.getNode()))
9236 SDValue N2Elt = N2.getOperand(i);
9258 return DAG.getNode(ISD::ADD, DL, VT, ExtendedCond, N2);
9264 isNullOrNullSplat(N2)) {
9283 SDValue N2 = N->getOperand(2);
9287 if (SDValue V = DAG.simplifySelect(N0, N1, N2))
9290 // vselect (not Cond), N1, N2 -> vselect Cond, N2, N1
9292 return DAG.getSelect(DL, VT, F, N2, N1);
9307 N1 == LHS && N2.getOpcode() == ISD::SUB && N1 == N2.getOperand(1))
9308 isAbs = ISD::isBuildVectorAllZeros(N2.getOperand(0).getNode());
9310 N2 == LHS && N1.getOpcode() == ISD::SUB && N2 == N1.getOperand(1))
9334 combineMinNumMaxNum(DL, VT, LHS, RHS, N1, N2, CC, TLI, DAG))
9357 // vselect (ext (setcc load(X), C)), N1, N2 -->
9358 // vselect (setcc extload(X), C'), N1, N2
9364 return DAG.getSelect(DL, N1.getValueType(), WideSetCC, N1, N2);
9369 if (SimplifySelectOps(N, N1, N2))
9372 // Fold (vselect (build_vector all_ones), N1, N2) -> N1
9375 // Fold (vselect (build_vector all_zeros), N1, N2) -> N2
9377 return N2;
9383 N2.getOpcode() == ISD::CONCAT_VECTORS &&
9398 SDValue N2 = N->getOperand(2);
9404 if (N2 == N3)
9405 return N2;
9414 return N2; // cond always true -> true val
9420 return N2;
9424 ISD::SELECT_CC, SDLoc(N), N2.getValueType(), SCC.getOperand(0),
9425 SCC.getOperand(1), N2, N3, SCC.getOperand(2));
9432 if (SimplifySelectOps(N, N2, N3))
9436 return SimplifySelectCC(SDLoc(N), N0, N1, N2, N3, CC);
13013 SDValue N2 = N->getOperand(2);
13027 isa<ConstantFPSDNode>(N2)) {
13028 return DAG.getNode(ISD::FMA, DL, VT, N0, N1, N2);
13031 // (-N0 * -N1) + N2 --> (N0 * N1) + N2
13043 return DAG.getNode(ISD::FMA, DL, VT, NegN0, NegN1, N2, Flags);
13047 return N2;
13049 return N2;
13053 return DAG.getNode(ISD::FADD, SDLoc(N), VT, N1, N2);
13055 return DAG.getNode(ISD::FADD, SDLoc(N), VT, N0, N2);
13060 return DAG.getNode(ISD::FMA, SDLoc(N), VT, N1, N0, N2);
13064 if (N2.getOpcode() == ISD::FMUL && N0 == N2.getOperand(0) &&
13066 isConstantFPBuildVectorOrConstantFP(N2.getOperand(1))) {
13068 DAG.getNode(ISD::FADD, DL, VT, N1, N2.getOperand(1),
13080 N2);
13089 return DAG.getNode(ISD::FADD, DL, VT, N0, N2);
13096 return DAG.getNode(ISD::FADD, DL, VT, N2, RHSNeg);
13105 DAG.getNode(ISD::FNEG, DL, VT, N1, Flags), N2);
13111 if (N1CFP && N0 == N2) {
13119 if (N1CFP && N2.getOpcode() == ISD::FNEG && N2.getOperand(0) == N0) {
14027 SDValue N2 = N->getOperand(2);
14042 N1.getOperand(0), N1.getOperand(1), N2);
14051 ChainHandle.getValue(), NewN1, N2);
19659 // If only one of N1,N2 is constant, bail out if it is not ALL_ZEROS as
20473 SDValue N2 = N->getOperand(2);
20483 N1.getOperand(1) == N2 && N1.getOperand(0).getValueType() == VT)
20488 // i.e. INSERT_SUBVECTOR UNDEF (BITCAST N1) N2 ->
20489 // BITCAST (INSERT_SUBVECTOR UNDEF N1 N2)
20492 N1.getOperand(0).getOperand(1) == N2 &&
20500 // If both N1 and N2 are bitcast values on which insert_subvector
20502 // i.e. INSERT_SUBVECTOR (BITCAST N0) (BITCAST N1) N2 ->
20503 // BITCAST (INSERT_SUBVECTOR N0 N1 N2)
20513 CN0.getValueType(), CN0, CN1, N2);
20523 N0.getOperand(2) == N2)
20525 N1, N2);
20528 // insert_subvector undef, (insert_subvector undef, X, 0), N2 -->
20529 // insert_subvector undef, X, N2
20533 N1.getOperand(1), N2);
20581 N0.getOperand(0), N1, N2);
20925 SDValue N2) {
20928 SDValue SCC = SimplifySelectCC(DL, N0.getOperand(0), N0.getOperand(1), N1, N2,
21147 /// Try to fold an expression of the form (N0 cond N1) ? N2 : N3 to a shift and
21150 SDValue N1, SDValue N2, SDValue N3,
21157 EVT AType = N2.getValueType();
21164 if (CC == ISD::SETGT && TLI.hasAndNot(N2)) {
21167 if (!(isAllOnesConstant(N1) || (isNullConstant(N1) && N0 == N2)))
21172 if (!(isNullConstant(N1) || (isOneConstant(N1) && N0 == N2)))
21181 auto *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
21197 return DAG.getNode(ISD::AND, DL, AType, Shift, N2);
21217 return DAG.getNode(ISD::AND, DL, AType, Shift, N2);
21225 const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3,
21232 auto *TV = dyn_cast<ConstantFPSDNode>(N2);
21234 EVT VT = N2.getValueType();
21277 /// Simplify an expression of the form (N0 cond N1) ? N2 : N3
21280 SDValue N2, SDValue N3, ISD::CondCode CC,
21283 if (N2 == N3) return N2;
21287 EVT VT = N2.getValueType();
21289 auto *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
21298 return !(SCCC->isNullValue()) ? N2 : N3;
21303 convertSelectOfFPConstantsToLoadOffset(DL, N0, N1, N2, N3, CC))
21306 if (SDValue V = foldSelectCCToShiftAnd(DL, N0, N1, N2, N3, CC))
21316 N0->getValueType(0) == VT && isNullConstant(N1) && isNullConstant(N2)) {
21343 bool Swap = N3C && isNullConstant(N2) && N3C->getAPIntValue().isPowerOf2();
21365 Temp = DAG.getZeroExtendInReg(SCC, SDLoc(N2), VT);
21367 Temp = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N2), VT, SCC);
21370 Temp = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N2), VT, SCC);
21384 return DAG.getNode(ISD::SHL, DL, N2.getValueType(), Temp,
21398 SDValue ValueOnZero = N2;