Lines Matching defs:CC
537 SDValue N2, SDValue N3, ISD::CondCode CC,
541 ISD::CondCode CC);
543 SDValue N2, SDValue N3, ISD::CondCode CC);
553 SDValue &CC, bool MatchStrict = false) const;
881 // equivalent to a setcc. Also, set the incoming LHS, RHS, and CC references to
885 SDValue &CC, bool MatchStrict) const {
889 CC = N.getOperand(2);
898 CC = N.getOperand(3);
913 CC = N.getOperand(4);
2104 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
2105 if (CC != ISD::SETEQ || !isNullConstant(SetCC.getOperand(1)) ||
7320 SDValue LHS, RHS, CC;
7322 isSetCCEquivalent(N0, LHS, RHS, CC, /*MatchStrict*/true)) {
7323 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
7356 isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){
8725 ISD::CondCode CC, const TargetLowering &TLI,
8731 switch (CC) {
8788 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
8789 if (CC == ISD::SETGT && isAllOnesOrAllOnesSplat(CondC) &&
8797 if (CC == ISD::SETLT && isNullOrNullSplat(CondC) && isNullOrNullSplat(C2)) {
9044 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
9052 CC, TLI, DAG))
9061 CC == ISD::SETUGT && N0.hasOneUse() && isAllOnesConstant(N1) &&
9301 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
9305 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) ||
9306 (ISD::isBuildVectorAllOnes(RHS.getNode()) && CC == ISD::SETGT)) &&
9309 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) &&
9334 combineMinNumMaxNum(DL, VT, LHS, RHS, N1, N2, CC, TLI, DAG))
9349 bool IsSigned = isSignedIntSetCC(CC);
9363 SDValue WideSetCC = DAG.getSetCC(DL, WideSetCCVT, WideLHS, WideRHS, CC);
9401 ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get();
9409 CC, SDLoc(N), false)) {
9436 return SimplifySelectCC(SDLoc(N), N0, N1, N2, N3, CC);
9591 ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get();
9592 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC))
9990 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
9996 if (CC == ISD::SETGT && isAllOnesConstant(Ones) && VT == XVT) {
10148 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
10169 return DAG.getSetCC(DL, VT, N00, N01, CC);
10176 SDValue VsetCC = DAG.getSetCC(DL, MatchingVecType, N00, N01, CC);
10199 SimplifySelectCC(DL, N00, N01, ExtTrueVal, Zero, CC, true))
10210 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC);
12972 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
12973 switch (CC) {
14157 CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1));
14168 CondLHS, CondRHS, CC->get(), SDLoc(N),
20968 ISD::CondCode CC;
20973 CC = cast<CondCodeSDNode>(TheSelect->getOperand(4))->get();
20980 CC = cast<CondCodeSDNode>(Cmp.getOperand(2))->get();
20986 Sqrt.getOperand(0) == CmpLHS && (CC == ISD::SETOLT ||
20987 CC == ISD::SETULT || CC == ISD::SETLT)) {
21151 ISD::CondCode CC) {
21164 if (CC == ISD::SETGT && TLI.hasAndNot(N2)) {
21169 } else if (CC == ISD::SETLT) {
21194 if (CC == ISD::SETGT)
21214 if (CC == ISD::SETGT)
21226 ISD::CondCode CC) {
21266 DAG.getSetCC(DL, getSetCCResultType(N0.getValueType()), N0, N1, CC);
21278 /// where 'cond' is the comparison specified by CC.
21280 SDValue N2, SDValue N3, ISD::CondCode CC,
21293 if (SDValue SCC = DAG.FoldSetCC(CmpResVT, N0, N1, CC, DL)) {
21303 convertSelectOfFPConstantsToLoadOffset(DL, N0, N1, N2, N3, CC))
21306 if (SDValue V = foldSelectCCToShiftAnd(DL, N0, N1, N2, N3, CC))
21315 if (CC == ISD::SETEQ && N0->getOpcode() == ISD::AND &&
21351 CC = ISD::getSetCCInverse(CC, CmpOpVT);
21363 SCC = DAG.getSetCC(DL, CmpResVT, N0, N1, CC);
21369 SCC = DAG.getSetCC(SDLoc(N0), MVT::i1, N0, N1, CC);
21397 if (N1C && N1C->isNullValue() && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
21401 if (CC == ISD::SETNE)