Lines Matching defs:Intf
357 InterferenceCache::Cursor Intf;
366 Intf.setPhysReg(Cache, Reg);
894 LiveInterval *Intf = Q.interferingVRegs()[i - 1];
895 assert(Register::isVirtualRegister(Intf->reg) &&
901 if (FixedRegisters.count(Intf->reg))
905 if (getStage(*Intf) == RS_Done)
914 (Intf->isSpillable() ||
916 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(Intf->reg)));
918 unsigned IntfCascade = ExtraRegInfo[Intf->reg].Cascade;
927 bool BreaksHint = VRM->hasPreferredPhys(Intf->reg);
930 Cost.MaxWeight = std::max(Cost.MaxWeight, Intf->weight);
937 if (!shouldEvict(VirtReg, IsHint, *Intf, BreaksHint))
942 if (!MaxCost.isMax() && IsLocal && LIS->intervalIsInOneMBB(*Intf) &&
943 (!EnableLocalReassign || !canReassign(*Intf, PhysReg))) {
973 LiveInterval *Intf = Q.interferingVRegs()[i - 1];
976 if (!Intf->overlaps(Start, End))
980 if (!Register::isVirtualRegister(Intf->reg))
983 if (getStage(*Intf) == RS_Done)
987 bool BreaksHint = VRM->hasPreferredPhys(Intf->reg);
990 Cost.MaxWeight = std::max(Cost.MaxWeight, Intf->weight);
1068 LiveInterval *Intf = Intfs[i];
1070 if (!VRM->hasPhys(Intf->reg))
1073 LastEvicted.addEviction(PhysReg, VirtReg.reg, Intf->reg);
1075 Matrix->unassign(*Intf);
1076 assert((ExtraRegInfo[Intf->reg].Cascade < Cascade ||
1077 VirtReg.isSpillable() < Intf->isSpillable()) &&
1079 ExtraRegInfo[Intf->reg].Cascade = Cascade;
1081 NewVRegs.push_back(Intf->reg);
1179 bool RAGreedy::addSplitConstraints(InterferenceCache::Cursor Intf,
1191 Intf.moveToBlock(BC.Number);
1199 if (!Intf.hasInterference())
1207 if (Intf.first() <= Indexes->getMBBStartIdx(BC.Number)) {
1210 } else if (Intf.first() < BI.FirstInstr) {
1213 } else if (Intf.first() < BI.LastInstr) {
1227 if (Intf.last() >= SA->getLastSplitPoint(BC.Number)) {
1230 } else if (Intf.last() > BI.LastInstr) {
1233 } else if (Intf.last() > BI.FirstInstr) {
1252 bool RAGreedy::addThroughConstraints(InterferenceCache::Cursor Intf,
1261 Intf.moveToBlock(Number);
1263 if (!Intf.hasInterference()) {
1283 if (Intf.first() <= Indexes->getMBBStartIdx(Number))
1289 if (Intf.last() >= SA->getLastSplitPoint(Number))
1342 if (!addThroughConstraints(Cand.Intf, NewBlocks))
1378 // The static split cost will be zero since Cand.Intf reports no interference.
1380 if (!addSplitConstraints(Cand.Intf, Cost)) {
1491 Cand.Intf.first(), Cand.Intf.last(), &MaxWeight);
1498 Cand.Intf.moveToBlock(BBNumber);
1508 if (EvictorLI.FindSegmentContaining(Cand.Intf.first()) == EvictorLI.end())
1517 Cand.Intf.first().getPrevIndex(), Cand.Intf.last());
1540 Cand.Intf.moveToBlock(BBNumber);
1544 if (!Matrix->checkInterference(Cand.Intf.first().getPrevIndex(),
1545 Cand.Intf.last(), PhysReg))
1552 Order, LIS->getInterval(VirtRegToSplit), Cand.Intf.first(),
1553 Cand.Intf.last(), &CheapestEvictWeight);
1560 Cand.Intf.first().getPrevIndex(), Cand.Intf.last());
1590 Cand.Intf.moveToBlock(BC.Number);
1594 if (EnableAdvancedRASplitCost && Cand.Intf.hasInterference() && BI.LiveIn &&
1631 Cand.Intf.moveToBlock(Number);
1632 if (Cand.Intf.hasInterference()) {
1697 Cand.Intf.moveToBlock(Number);
1698 IntfIn = Cand.Intf.first();
1706 Cand.Intf.moveToBlock(Number);
1707 IntfOut = Cand.Intf.last();
1746 Cand.Intf.moveToBlock(Number);
1747 IntfIn = Cand.Intf.first();
1754 Cand.Intf.moveToBlock(Number);
1755 IntfOut = Cand.Intf.last();
1892 if (!addSplitConstraints(Cand.Intf, Cost)) {
2527 LiveInterval *Intf = Q.interferingVRegs()[i - 1];
2528 // If Intf is done and sit on the same register class as VirtReg,
2530 // However, if VirtReg has tied defs and Intf doesn't, then
2532 if (((getStage(*Intf) == RS_Done &&
2533 MRI->getRegClass(Intf->reg) == CurRC) &&
2534 !(hasTiedDef(MRI, VirtReg.reg) && !hasTiedDef(MRI, Intf->reg))) ||
2535 FixedRegisters.count(Intf->reg)) {
2540 RecoloringCandidates.insert(Intf);