Lines Matching defs:LRI
191 void addKillFlag(const LiveReg &LRI);
400 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);
401 if (LRI != LiveVirtRegs.end() && LRI->PhysReg)
402 killVirtReg(*LRI);
411 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);
412 assert(LRI != LiveVirtRegs.end() && LRI->PhysReg &&
414 spillVirtReg(MI, *LRI);
576 LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg);
577 assert(LRI != LiveVirtRegs.end() && LRI->PhysReg &&
579 return LRI->Dirty ? spillDirty : spillClean;
597 LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg);
598 assert(LRI != LiveVirtRegs.end() && LRI->PhysReg &&
600 Cost += LRI->Dirty ? spillDirty : spillClean;
757 LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg);
759 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {
760 PhysReg = LRI->PhysReg;
781 LiveRegMap::iterator LRI;
783 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));
784 if (!LRI->PhysReg) {
793 allocVirtReg(MI, *LRI, Hint);
794 } else if (LRI->LastUse) {
797 if (LRI->LastUse != &MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse())
798 addKillFlag(*LRI);
800 assert(LRI->PhysReg && "Register not assigned");
801 LRI->LastUse = &MI;
802 LRI->LastOpNum = OpNum;
803 LRI->Dirty = true;
804 markRegUsedInInstr(LRI->PhysReg);
805 return LRI->PhysReg;
814 LiveRegMap::iterator LRI;
816 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));
818 if (!LRI->PhysReg) {
819 allocVirtReg(MI, *LRI, Hint);
820 reload(MI, VirtReg, LRI->PhysReg);
821 } else if (LRI->Dirty) {
846 assert(LRI->PhysReg && "Register not assigned");
847 LRI->LastUse = &MI;
848 LRI->LastOpNum = OpNum;
849 markRegUsedInInstr(LRI->PhysReg);
850 return *LRI;
990 LiveRegMap::iterator LRI = findLiveVirtReg(PhysRegState[Reg]);
991 assert(LRI != LiveVirtRegs.end() && LRI->PhysReg &&
993 if (LRI->Dirty)
995 assert(LRI->PhysReg == Reg && "Bad inverse map");
1224 LiveRegMap::iterator LRI = findLiveVirtReg(Reg);
1225 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {
1226 setPhysReg(MI, MO, LRI->PhysReg);