Lines Matching defs:SU
601 for (const SUnit *SU : Queue)
602 dbgs() << SU->NodeNum << " ";
620 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) {
637 // SU->TopReadyCycle was set to CurrCycle when it was scheduled. However,
639 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency())
640 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency();
647 /// releaseSuccessors - Call releaseSucc on each of SU's successors.
648 void ScheduleDAGMI::releaseSuccessors(SUnit *SU) {
649 for (SDep &Succ : SU->Succs)
650 releaseSucc(SU, &Succ);
657 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) {
674 // SU->BotReadyCycle was set to CurrCycle when it was scheduled. However,
676 if (PredSU->BotReadyCycle < SU->BotReadyCycle + PredEdge->getLatency())
677 PredSU->BotReadyCycle = SU->BotReadyCycle + PredEdge->getLatency();
684 /// releasePredecessors - Call releasePred on each of SU's predecessors.
685 void ScheduleDAGMI::releasePredecessors(SUnit *SU) {
686 for (SDep &Pred : SU->Preds)
687 releasePred(SU, &Pred);
775 SUnit *SU = SchedImpl->pickNode(IsTopNode);
776 if (!SU) break;
778 assert(!SU->isScheduled && "Node already scheduled");
782 MachineInstr *MI = SU->getInstr();
784 assert(SU->isTopReady() && "node still has unscheduled dependencies");
790 assert(SU->isBottomReady() && "node still has unscheduled dependencies");
806 SchedImpl->schedNode(SU, IsTopNode);
808 updateQueues(SU, IsTopNode);
831 for (SUnit &SU : SUnits) {
832 assert(!SU.isBoundaryNode() && "Boundary node should not be in SUnits");
835 SU.biasCriticalPath();
838 if (!SU.NumPredsLeft)
839 TopRoots.push_back(&SU);
841 if (!SU.NumSuccsLeft)
842 BotRoots.push_back(&SU);
857 for (SUnit *SU : TopRoots)
858 SchedImpl->releaseTopNode(SU);
878 void ScheduleDAGMI::updateQueues(SUnit *SU, bool IsTopNode) {
881 releaseSuccessors(SU);
883 releasePredecessors(SU);
885 SU->isScheduled = true;
914 if (SUnit *SU = getSUnit(&(*MI)))
915 dumpNode(*SU);
931 void ScheduleDAGMILive::collectVRegUses(SUnit &SU) {
932 const MachineInstr &MI = *SU.getInstr();
961 if (UI->SU == &SU)
965 VRegUses.insert(VReg2SUnit(Reg, LaneBitmask::getNone(), &SU));
998 for (SUnit &SU : SUnits)
999 collectVRegUses(SU);
1070 updateScheduledPressure(const SUnit *SU,
1072 const PressureDiff &PDiff = getPressureDiff(SU);
1115 SUnit &SU = *V2SU.SU;
1116 if (SU.isScheduled || &SU == &ExitSU)
1119 PressureDiff &PDiff = getPressureDiff(&SU);
1121 LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU.NodeNum << ") "
1123 << PrintLaneMask(P.LaneMask) << ' ' << *SU.getInstr();
1147 SUnit *SU = V2SU.SU;
1150 if (!SU->isScheduled && SU != &ExitSU) {
1152 LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1154 PressureDiff &PDiff = getPressureDiff(SU);
1156 LLVM_DEBUG(dbgs() << " UpdateRegP: SU(" << SU->NodeNum << ") "
1157 << *SU->getInstr();
1170 for (const SUnit &SU : SUnits) {
1171 dumpNodeAll(SU);
1174 getPressureDiff(&SU).dump(*TRI);
1177 if (SchedModel.mustBeginGroup(SU.getInstr()) &&
1178 SchedModel.mustEndGroup(SU.getInstr()))
1223 SUnit *SU = SchedImpl->pickNode(IsTopNode);
1224 if (!SU) break;
1226 assert(!SU->isScheduled && "Node already scheduled");
1230 scheduleMI(SU, IsTopNode);
1233 unsigned SubtreeID = DFSResult->getSubtreeID(SU);
1242 SchedImpl->schedNode(SU, IsTopNode);
1244 updateQueues(SU, IsTopNode);
1344 SUnit *SU = V2SU.SU;
1345 if (SU == &ExitSU)
1349 LiveQueryResult LRQ = LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1357 if (LiveOutDepth > SU->getDepth())
1358 CyclicLatency = LiveOutDepth - SU->getDepth();
1360 unsigned LiveInHeight = SU->getHeight() + DefSU->Latency;
1367 LLVM_DEBUG(dbgs() << "Cyclic Path: SU(" << DefSU->NodeNum << ") -> SU("
1368 << SU->NodeNum << ") = " << CyclicLatency << "c\n");
1389 void ScheduleDAGMILive::scheduleMI(SUnit *SU, bool IsTopNode) {
1391 MachineInstr *MI = SU->getInstr();
1394 assert(SU->isTopReady() && "node still has unscheduled dependencies");
1420 updateScheduledPressure(SU, TopRPTracker.getPressure().MaxSetPressure);
1423 assert(SU->isBottomReady() && "node still has unscheduled dependencies");
1457 updateScheduledPressure(SU, BotRPTracker.getPressure().MaxSetPressure);
1473 SUnit *SU;
1478 MemOpInfo(SUnit *SU, ArrayRef<const MachineOperand *> BaseOps,
1480 : SU(SU), BaseOps(BaseOps.begin(), BaseOps.end()), Offset(Offset),
1514 return SU->NodeNum < RHS.SU->NodeNum;
1569 for (SUnit *SU : MemOps) {
1570 const MachineInstr &MI = *SU->getInstr();
1577 MemOpRecords.push_back(MemOpInfo(SU, BaseOps, Offset, Width));
1612 SUnit *SUa = MemOpa.SU;
1613 SUnit *SUb = MemOpb.SU;
1624 LLVM_DEBUG(dbgs() << "Cluster ld/st SU(" << SUa->NodeNum << ") - SU("
1634 LLVM_DEBUG(dbgs() << " Copy Succ SU(" << Succ.getSUnit()->NodeNum
1649 for (SUnit &SU : DAG->SUnits) {
1650 if ((IsLoad && !SU.getInstr()->mayLoad()) ||
1651 (!IsLoad && !SU.getInstr()->mayStore()))
1655 for (const SDep &Pred : SU.Preds) {
1661 // Insert the SU to corresponding store chain.
1663 Chain.push_back(&SU);
1836 LLVM_DEBUG(dbgs() << "Constraining copy SU(" << CopySU->NodeNum << ")\n");
1840 LLVM_DEBUG(dbgs() << " Local use SU(" << (*I)->NodeNum << ") -> SU("
1846 LLVM_DEBUG(dbgs() << " Global use SU(" << (*I)->NodeNum << ") -> SU("
1865 for (SUnit &SU : DAG->SUnits) {
1866 if (!SU.getInstr()->isCopy())
1869 constrainLocalCopy(&SU, static_cast<ScheduleDAGMILive*>(DAG));
1934 for (SUnit &SU : DAG->SUnits) {
1935 const MCSchedClassDesc *SC = DAG->getSchedClass(&SU);
1936 RemIssueCount += SchedModel->getNumMicroOps(SU.getInstr(), SC)
1976 unsigned SchedBoundary::getLatencyStallCycles(SUnit *SU) {
1977 if (!SU->isUnbuffered)
1980 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);
2023 /// Does this SU have a hazard within the current instruction group.
2035 /// TODO: Also check whether the SU must start a new group.
2036 bool SchedBoundary::checkHazard(SUnit *SU) {
2038 && HazardRec->getHazardType(SU) != ScheduleHazardRecognizer::NoHazard) {
2042 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr());
2044 LLVM_DEBUG(dbgs() << " SU(" << SU->NodeNum << ") uops="
2045 << SchedModel->getNumMicroOps(SU->getInstr()) << '\n');
2050 ((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) ||
2051 (!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) {
2052 LLVM_DEBUG(dbgs() << " hazard: SU(" << SU->NodeNum << ") must "
2057 if (SchedModel->hasInstrSchedModel() && SU->hasReservedResource) {
2058 const MCSchedClassDesc *SC = DAG->getSchedClass(SU);
2070 LLVM_DEBUG(dbgs() << " SU(" << SU->NodeNum << ") "
2086 for (SUnit *SU : ReadySUs) {
2087 unsigned L = getUnscheduledLatency(SU);
2090 LateSU = SU;
2094 LLVM_DEBUG(dbgs() << Available.getName() << " RemLatency SU("
2130 void SchedBoundary::releaseNode(SUnit *SU, unsigned ReadyCycle, bool InPQueue,
2132 assert(SU->getInstr() && "Scheduled SUnit must have instr");
2149 checkHazard(SU) || (Available.size() >= ReadyListLimit);
2152 Available.push(SU);
2160 Pending.push(SU);
2249 void SchedBoundary::bumpNode(SUnit *SU) {
2252 if (!isTop() && SU->isCall) {
2257 HazardRec->EmitInstruction(SU);
2263 const MCSchedClassDesc *SC = DAG->getSchedClass(SU);
2264 unsigned IncMOps = SchedModel->getNumMicroOps(SU->getInstr());
2269 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);
2288 if (SU->isUnbuffered && ReadyCycle > NextCycle)
2322 if (SU->hasReservedResource) {
2346 if (SU->getDepth() > TopLatency) {
2347 TopLatency = SU->getDepth();
2348 LLVM_DEBUG(dbgs() << " " << Available.getName() << " TopLatency SU("
2349 << SU->NodeNum << ") " << TopLatency << "c\n");
2351 if (SU->getHeight() > BotLatency) {
2352 BotLatency = SU->getHeight();
2353 LLVM_DEBUG(dbgs() << " " << Available.getName() << " BotLatency SU("
2354 << SU->NodeNum << ") " << BotLatency << "c\n");
2376 if ((isTop() && SchedModel->mustEndGroup(SU->getInstr())) ||
2377 (!isTop() && SchedModel->mustBeginGroup(SU->getInstr()))) {
2401 SUnit *SU = *(Pending.begin() + I);
2402 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle;
2410 releaseNode(SU, ReadyCycle, true, I);
2419 /// Remove SU from the ready set for this boundary.
2420 void SchedBoundary::removeReady(SUnit *SU) {
2421 if (Available.isInQueue(SU))
2422 Available.remove(Available.find(SU));
2424 assert(Pending.isInQueue(SU) && "bad ready count");
2425 Pending.remove(Pending.find(SU));
2498 const MCSchedClassDesc *SC = DAG->getSchedClass(SU);
2659 Latency = Cand.SU->getDepth();
2662 Latency = Cand.SU->getHeight();
2665 Latency = Cand.SU->getHeight();
2668 Latency = Cand.SU->getDepth();
2671 dbgs() << " Cand SU(" << Cand.SU->NodeNum << ") " << getReasonStr(Cand.Reason);
2727 if (Cand.SU->getDepth() > Zone.getScheduledLatency()) {
2728 if (tryLess(TryCand.SU->getDepth(), Cand.SU->getDepth(),
2732 if (tryGreater(TryCand.SU->getHeight(), Cand.SU->getHeight(),
2736 if (Cand.SU->getHeight() > Zone.getScheduledLatency()) {
2737 if (tryLess(TryCand.SU->getHeight(), Cand.SU->getHeight(),
2741 if (tryGreater(TryCand.SU->getDepth(), Cand.SU->getDepth(),
2787 TopCand.SU = nullptr;
2788 BotCand.SU = nullptr;
2892 for (const SUnit *SU : Bot.Available) {
2893 if (SU->getDepth() > Rem.CriticalPath)
2894 Rem.CriticalPath = SU->getDepth();
2947 unsigned getWeakLeft(const SUnit *SU, bool isTop) {
2948 return (isTop) ? SU->WeakPredsLeft : SU->WeakSuccsLeft;
2958 int biasPhysReg(const SUnit *SU, bool isTop) {
2959 const MachineInstr *MI = SU->getInstr();
2970 bool AtBoundary = isTop ? !SU->NumSuccsLeft : !SU->NumPredsLeft;
2995 void GenericScheduler::initCandidate(SchedCandidate &Cand, SUnit *SU,
2999 Cand.SU = SU;
3004 Cand.SU->getInstr(),
3011 Cand.SU->getInstr(),
3012 &DAG->getPressureDiff(Cand.SU),
3018 Cand.SU->getInstr(),
3019 DAG->getPressureDiff(Cand.SU),
3027 << " Try SU(" << Cand.SU->NodeNum << ") "
3052 if (tryGreater(biasPhysReg(TryCand.SU, TryCand.AtTop),
3053 biasPhysReg(Cand.SU, Cand.AtTop), TryCand, Cand, PhysReg))
3085 if (tryLess(Zone->getLatencyStallCycles(TryCand.SU),
3086 Zone->getLatencyStallCycles(Cand.SU), TryCand, Cand, Stall))
3100 if (tryGreater(TryCand.SU == TryCandNextClusterSU,
3101 Cand.SU == CandNextClusterSU,
3107 if (tryLess(getWeakLeft(TryCand.SU, TryCand.AtTop),
3108 getWeakLeft(Cand.SU, Cand.AtTop),
3138 if ((Zone->isTop() && TryCand.SU->NodeNum < Cand.SU->NodeNum)
3139 || (!Zone->isTop() && TryCand.SU->NodeNum > Cand.SU->NodeNum)) {
3158 for (SUnit *SU : Q) {
3161 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, TempTracker);
3179 if (SUnit *SU = Bot.pickOnlyChoice()) {
3182 return SU;
3184 if (SUnit *SU = Top.pickOnlyChoice()) {
3187 return SU;
3200 if (!BotCand.isValid() || BotCand.SU->isScheduled ||
3212 assert(TCand.SU == BotCand.SU &&
3220 if (!TopCand.isValid() || TopCand.SU->isScheduled ||
3232 assert(TCand.SU == TopCand.SU &&
3251 return Cand.SU;
3261 SUnit *SU;
3264 SU = Top.pickOnlyChoice();
3265 if (!SU) {
3271 SU = TopCand.SU;
3275 SU = Bot.pickOnlyChoice();
3276 if (!SU) {
3282 SU = BotCand.SU;
3286 SU = pickNodeBidirectional(IsTopNode);
3288 } while (SU->isScheduled);
3290 if (SU->isTopReady())
3291 Top.removeReady(SU);
3292 if (SU->isBottomReady())
3293 Bot.removeReady(SU);
3295 LLVM_DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") "
3296 << *SU->getInstr());
3297 return SU;
3300 void GenericScheduler::reschedulePhysReg(SUnit *SU, bool isTop) {
3301 MachineBasicBlock::iterator InsertPos = SU->getInstr();
3304 SmallVectorImpl<SDep> &Deps = isTop ? SU->Preds : SU->Succs;
3331 void GenericScheduler::schedNode(SUnit *SU, bool IsTopNode) {
3333 SU->TopReadyCycle = std::max(SU->TopReadyCycle, Top.getCurrCycle());
3334 Top.bumpNode(SU);
3335 if (SU->hasPhysRegUses)
3336 reschedulePhysReg(SU, true);
3338 SU->BotReadyCycle = std::max(SU->BotReadyCycle, Bot.getCurrCycle());
3339 Bot.bumpNode(SU);
3340 if (SU->hasPhysRegDefs)
3341 reschedulePhysReg(SU, false);
3394 for (const SUnit *SU : BotRoots) {
3395 if (SU->getDepth() > Rem.CriticalPath)
3396 Rem.CriticalPath = SU->getDepth();
3417 if (tryLess(Top.getLatencyStallCycles(TryCand.SU),
3418 Top.getLatencyStallCycles(Cand.SU), TryCand, Cand, Stall))
3422 if (tryGreater(TryCand.SU == DAG->getNextClusterSucc(),
3423 Cand.SU == DAG->getNextClusterSucc(),
3442 if (TryCand.SU->NodeNum < Cand.SU->NodeNum)
3448 for (SUnit *SU : Q) {
3450 TryCand.SU = SU;
3467 SUnit *SU;
3469 SU = Top.pickOnlyChoice();
3470 if (SU) {
3481 SU = TopCand.SU;
3483 } while (SU->isScheduled);
3486 Top.removeReady(SU);
3488 LLVM_DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") "
3489 << *SU->getInstr());
3490 return SU;
3495 void PostGenericScheduler::schedNode(SUnit *SU, bool IsTopNode) {
3496 SU->TopReadyCycle = std::max(SU->TopReadyCycle, Top.getCurrCycle());
3497 Top.bumpNode(SU);
3575 SUnit *SU = ReadyQ.back();
3579 << "SU(" << SU->NodeNum << ") "
3580 << " ILP: " << DAG->getDFSResult()->getILP(SU)
3581 << " Tree: " << DAG->getDFSResult()->getSubtreeID(SU)
3584 DAG->getDFSResult()->getSubtreeID(SU))
3586 << "Scheduling " << *SU->getInstr());
3587 return SU;
3597 void schedNode(SUnit *SU, bool IsTopNode) override {
3603 void releaseBottomNode(SUnit *SU) override {
3604 ReadyQ.push_back(SU);
3670 SUnit *SU;
3674 SU = TopQ.top();
3676 } while (SU->isScheduled);
3681 SU = BottomQ.top();
3683 } while (SU->isScheduled);
3688 return SU;
3691 void schedNode(SUnit *SU, bool IsTopNode) override {}
3693 void releaseTopNode(SUnit *SU) override {
3694 TopQ.push(SU);
3696 void releaseBottomNode(SUnit *SU) override {
3697 BottomQ.push(SU);
3758 static std::string getNodeLabel(const SUnit *SU, const ScheduleDAG *G) {
3764 SS << "SU:" << SU->NodeNum;
3766 SS << " I:" << DFS->getNumInstrs(SU);
3770 static std::string getNodeDescription(const SUnit *SU, const ScheduleDAG *G) {
3771 return G->getGraphNodeLabel(SU);