Lines Matching refs:TII
119 const TargetInstrInfo *TII;
343 TII = ST.getInstrInfo();
517 (TII->isLoadFromStackSlot(*MI, FI) && MFI->isSpillSlotObjectIndex(FI)))
867 if (!TII->analyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
1160 if (TII->hasHighOperandLatency(SchedModel, MRI, MI, DefIdx, UseMI, i))
1174 if (TII->isAsCheapAsAMove(MI) || MI.isCopyLike())
1188 if (!TII->hasLowDefLatency(SchedModel, MI, i))
1268 if (TII->isTriviallyReMaterializable(MI, AA))
1321 if (!TII->isTriviallyReMaterializable(MI, AA) &&
1347 TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(),
1352 const MCInstrDesc &MID = TII->get(NewOpc);
1354 const TargetRegisterClass *RC = TII->getRegClass(MID, LoadRegIndex, TRI, MF);
1359 bool Success = TII->unfoldMemoryOperand(MF, *MI, Reg,
1407 if (TII->produceSameValue(*MI, *PrevMI, (PreRegAlloc ? MRI : nullptr)))