Lines Matching refs:Def
90 /// operand \p Def.
91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
252 const MachineOperand &Def = MI.getOperand(0);
253 Register DefReg = Def.getReg();
283 // FIXME: PATCHPOINT instructions announce a Def that does not always exist,
287 const MachineOperand &Def = *MI.defs().begin();
288 Register DefReg = Def.getReg();
298 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes);
310 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
312 const MachineInstr &MI = *Def.getParent();
346 assert(Def.getSubReg() == 0 &&
348 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());
358 const MachineOperand &Def = *MRI->def_begin(Reg);
359 const MachineInstr &DefMI = *Def.getParent();
367 if (Def.isDead())
405 DefinedLanes |= transferDefinedLanes(Def, OpNum, MODefinedLanes);
409 if (DefMI.isImplicitDef() || Def.isDead())
412 assert(Def.getSubReg() == 0 &&
430 const MachineOperand &Def = *UseMI.defs().begin();
431 Register DefReg = Def.getReg();
472 const MachineOperand &Def = MI.getOperand(0);
473 Register DefReg = Def.getReg();
514 MachineOperand &Def = *MRI->def_begin(Reg);
515 const MachineInstr &MI = *Def.getParent();
529 << " Def: " << PrintLaneMask(Info.DefinedLanes) << '\n';