Lines Matching refs:__m128
101 static __inline__ __m128 __DEFAULT_FN_ATTRS128
102 _mm_mask_andnot_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
103 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
108 static __inline__ __m128 __DEFAULT_FN_ATTRS128
109 _mm_maskz_andnot_ps(__mmask8 __U, __m128 __A, __m128 __B) {
110 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
157 static __inline__ __m128 __DEFAULT_FN_ATTRS128
158 _mm_mask_and_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
159 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
164 static __inline__ __m128 __DEFAULT_FN_ATTRS128
165 _mm_maskz_and_ps(__mmask8 __U, __m128 __A, __m128 __B) {
166 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
213 static __inline__ __m128 __DEFAULT_FN_ATTRS128
214 _mm_mask_xor_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
215 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
220 static __inline__ __m128 __DEFAULT_FN_ATTRS128
221 _mm_maskz_xor_ps(__mmask8 __U, __m128 __A, __m128 __B) {
222 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
269 static __inline__ __m128 __DEFAULT_FN_ATTRS128
270 _mm_mask_or_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
271 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
276 static __inline__ __m128 __DEFAULT_FN_ATTRS128
277 _mm_maskz_or_ps(__mmask8 __U, __m128 __A, __m128 __B) {
278 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
368 _mm_cvtps_epi64 (__m128 __A) {
375 _mm_mask_cvtps_epi64 (__m128i __W, __mmask8 __U, __m128 __A) {
382 _mm_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A) {
389 _mm256_cvtps_epi64 (__m128 __A) {
396 _mm256_mask_cvtps_epi64 (__m256i __W, __mmask8 __U, __m128 __A) {
403 _mm256_maskz_cvtps_epi64 (__mmask8 __U, __m128 __A) {
410 _mm_cvtps_epu64 (__m128 __A) {
417 _mm_mask_cvtps_epu64 (__m128i __W, __mmask8 __U, __m128 __A) {
424 _mm_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) {
431 _mm256_cvtps_epu64 (__m128 __A) {
438 _mm256_mask_cvtps_epu64 (__m256i __W, __mmask8 __U, __m128 __A) {
445 _mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) {
489 static __inline__ __m128 __DEFAULT_FN_ATTRS128
491 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
496 static __inline__ __m128 __DEFAULT_FN_ATTRS128
497 _mm_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m128i __A) {
498 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
503 static __inline__ __m128 __DEFAULT_FN_ATTRS128
505 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
510 static __inline__ __m128 __DEFAULT_FN_ATTRS256
512 return (__m128)__builtin_convertvector((__v4di)__A, __v4sf);
515 static __inline__ __m128 __DEFAULT_FN_ATTRS256
516 _mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A) {
517 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
522 static __inline__ __m128 __DEFAULT_FN_ATTRS256
524 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
614 _mm_cvttps_epi64 (__m128 __A) {
621 _mm_mask_cvttps_epi64 (__m128i __W, __mmask8 __U, __m128 __A) {
628 _mm_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A) {
635 _mm256_cvttps_epi64 (__m128 __A) {
642 _mm256_mask_cvttps_epi64 (__m256i __W, __mmask8 __U, __m128 __A) {
649 _mm256_maskz_cvttps_epi64 (__mmask8 __U, __m128 __A) {
656 _mm_cvttps_epu64 (__m128 __A) {
663 _mm_mask_cvttps_epu64 (__m128i __W, __mmask8 __U, __m128 __A) {
670 _mm_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) {
677 _mm256_cvttps_epu64 (__m128 __A) {
684 _mm256_mask_cvttps_epu64 (__m256i __W, __mmask8 __U, __m128 __A) {
691 _mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) {
735 static __inline__ __m128 __DEFAULT_FN_ATTRS128
737 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
742 static __inline__ __m128 __DEFAULT_FN_ATTRS128
743 _mm_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m128i __A) {
744 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
749 static __inline__ __m128 __DEFAULT_FN_ATTRS128
751 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
756 static __inline__ __m128 __DEFAULT_FN_ATTRS256
758 return (__m128)__builtin_convertvector((__v4du)__A, __v4sf);
761 static __inline__ __m128 __DEFAULT_FN_ATTRS256
762 _mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A) {
763 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
768 static __inline__ __m128 __DEFAULT_FN_ATTRS256
770 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
812 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
813 (__v4sf)(__m128)(B), (int)(C), \
818 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
819 (__v4sf)(__m128)(B), (int)(C), \
820 (__v4sf)(__m128)(W), (__mmask8)(U))
823 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
824 (__v4sf)(__m128)(B), (int)(C), \
876 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
881 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
882 (__v4sf)(__m128)(W), \
886 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
954 _mm256_broadcast_f32x2 (__m128 __A)
961 _mm256_mask_broadcast_f32x2 (__m256 __O, __mmask8 __M, __m128 __A)
969 _mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A)
1149 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \
1153 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \