Lines Matching refs:timer
44 #define PIC_CTRL_STE 10 /* system timer interrupt enable */
49 #define PIC_CTRL_WTE 0 /* watchdog timer enable */
54 #define PIC_STS_STATUS 4 /* System timer interrupt status */
278 nlm_pic_read_timer(uint64_t base, int timer)
280 return nlm_read_pic_reg(base, PIC_TIMER_COUNT(timer));
284 nlm_pic_write_timer(uint64_t base, int timer, uint64_t value)
286 nlm_write_pic_reg(base, PIC_TIMER_COUNT(timer), value);
290 nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu)
302 nlm_write_pic_reg(base, PIC_TIMER_MAXVAL(timer), value);
303 nlm_pic_write_irt_direct(base, PIC_IRT_TIMER_INDEX(timer),
306 /* enable the timer */
308 pic_ctrl |= (1 << (PIC_CTRL_STE + timer));