Lines Matching refs:mtk_pcie_phy_set
866 #define mtk_pcie_phy_set(_sc, _reg, _s, _n, _v) \
874 mtk_pcie_phy_set(sc, off + 0x002c, 12, 1, 1);
875 mtk_pcie_phy_set(sc, off + 0x002c, 4, 1, 1);
876 mtk_pcie_phy_set(sc, off + 0x012c, 12, 1, 1);
877 mtk_pcie_phy_set(sc, off + 0x012c, 4, 1, 1);
878 mtk_pcie_phy_set(sc, off + 0x102c, 12, 1, 1);
879 mtk_pcie_phy_set(sc, off + 0x102c, 4, 1, 1);
890 mtk_pcie_phy_set(sc, off + 0x400, 8, 1, 1);
891 mtk_pcie_phy_set(sc, off + 0x400, 9, 2, 0);
892 mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 1);
893 mtk_pcie_phy_set(sc, off + 0x100, 4, 1, 1);
894 mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 0);
895 mtk_pcie_phy_set(sc, off + 0x100, 5, 1, 0);
898 mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 1);
899 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x1a);
900 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a);
902 mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0);
904 mtk_pcie_phy_set(sc, off + 0x4bc, 4, 2, 0x01);
905 mtk_pcie_phy_set(sc, off + 0x49c, 0, 31, 0x18000000);
906 mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x18d);
907 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x4a);
908 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x4a);
909 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x11);
910 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x11);
912 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x1a);
913 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a);
917 mtk_pcie_phy_set(sc, off + 0x4a0, 5, 1, 1);
918 mtk_pcie_phy_set(sc, off + 0x490, 22, 2, 2);
919 mtk_pcie_phy_set(sc, off + 0x490, 18, 4, 6);
920 mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 2);
921 mtk_pcie_phy_set(sc, off + 0x490, 8, 4, 1);
922 mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 0);
923 mtk_pcie_phy_set(sc, off + 0x490, 1, 3, 2);
926 mtk_pcie_phy_set(sc, off + 0x414, 6, 2, 1);
927 mtk_pcie_phy_set(sc, off + 0x414, 5, 1, 1);
930 mtk_pcie_phy_set(sc, off + 0x414, 28, 2, 1);
931 mtk_pcie_phy_set(sc, off + 0x040, 17, 4, 7);
932 mtk_pcie_phy_set(sc, off + 0x040, 16, 1, 1);
933 mtk_pcie_phy_set(sc, off + 0x140, 17, 4, 7);
934 mtk_pcie_phy_set(sc, off + 0x140, 16, 1, 1);
936 mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 1);
937 mtk_pcie_phy_set(sc, off + 0x100, 5, 1, 1);
938 mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 0);
939 mtk_pcie_phy_set(sc, off + 0x100, 4, 1, 0);
1010 mtk_pcie_phy_set(sc, off + 0x400, 8, 1, 1);
1011 mtk_pcie_phy_set(sc, off + 0x400, 9, 2, 0);
1012 mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 1);
1013 mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 0);
1014 mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 3);
1017 mtk_pcie_phy_set(sc, off + 0x4bc, 24, 8, 0x7d);
1018 mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 0x08);
1019 mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0x01);
1020 mtk_pcie_phy_set(sc, off + 0x4c0, 0, 32, 0x1f400000);
1021 mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x013d);
1022 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x74);
1023 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 16, 0x74);
1025 mtk_pcie_phy_set(sc, off + 0x4bc, 24, 8, 0x64);
1026 mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 0x0a);
1027 mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0x00);
1028 mtk_pcie_phy_set(sc, off + 0x4c0, 0, 32, 0x19000000);
1029 mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x018d);
1030 mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x4a);
1031 mtk_pcie_phy_set(sc, off + 0x4a8, 0, 16, 0x4a);
1034 mtk_pcie_phy_set(sc, off + 0x498, 0, 8, 5);
1035 mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 1);
1036 mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 0);