Lines Matching refs:TW_INT32
65 TW_INT32
66 tw_cl_ctlr_supported(TW_INT32 vendor_id, TW_INT32 device_id)
92 TW_INT32
93 tw_cl_get_pci_bar_info(TW_INT32 device_id, TW_INT32 bar_type,
94 TW_INT32 *bar_num, TW_INT32 *bar0_offset, TW_INT32 *bar_size)
96 TW_INT32 error = TW_OSL_ESUCCESS;
182 TW_INT32
184 TW_UINT32 flags, TW_INT32 device_id, TW_INT32 max_simult_reqs,
185 TW_INT32 max_aens, TW_UINT32 *alignment, TW_UINT32 *sg_size_factor,
250 TW_INT32
252 TW_INT32 device_id, TW_INT32 max_simult_reqs, TW_INT32 max_aens,
259 TW_INT32 error = TW_OSL_ESUCCESS;
260 TW_INT32 i;
412 TW_INT32
420 TW_INT32 error = TW_OSL_ESUCCESS;
559 TW_INT32
564 TW_INT32 error;
630 TW_INT32
641 TW_INT32 error = TW_OSL_EBUSY;