Lines Matching refs:TI_SETBIT
293 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
300 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
305 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
318 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
382 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
2019 TI_SETBIT(sc, TI_PCI_STATE,
2059 TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
2076 TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
2077 TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
2078 TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
2096 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
2133 TI_SETBIT(sc, TI_PCI_STATE, pci_writemax);
2136 TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA);
2162 TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE);
3421 TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX);
3440 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB);
3442 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB);
3445 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX);
3447 TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX);