dev/ixl/i40e_common.c

1504  * Make sure all PXE mode settings are cleared, including things
1829 	/* clear the old pause settings */
1836 		/* Auto restart link so settings take effect */
1839 		/* Copy over all the old settings */
1878  * Configure MAC settings for frame size, jumbo frame support and the
4342  * @restore: True if factory settings should be restored
4345  * Restore LLDP Agent factory settings if @restore set to True. In other case
4992  * EMP will return when the shared RPB settings have been
5378  * @settings: Filter control settings
5380  * Check and validate the filter control settings passed.
5388 				struct i40e_filter_control_settings *settings)
5396 	/* Validate FCoE settings passed */
5397 	switch (settings->fcoe_filt_num) {
5405 		fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
5411 	switch (settings->fcoe_cntx_num) {
5417 		fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
5423 	/* Validate PE settings passed */
5424 	switch (settings->pe_filt_num) {
5437 		pe_filt_size <<= (u32)settings->pe_filt_num;
5443 	switch (settings->pe_cntx_num) {
5455 		pe_cntx_size <<= (u32)settings->pe_cntx_num;
5474  * @settings: Filter control settings
5477  * for a single PF. It is expected that these settings are programmed
5481 				struct i40e_filter_control_settings *settings)
5487 	if (!settings)
5490 	/* Validate the input settings */
5491 	ret = i40e_validate_filter_settings(hw, settings);
5500 	val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
5504 	val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
5509 	val |= ((u32)settings->fcoe_filt_num <<
5514 	val |= ((u32)settings->fcoe_cntx_num <<
5520 	if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
5526 	if (settings->enable_fdir)
5528 	if (settings->enable_ethtype)
5530 	if (settings->enable_macvlan)