Lines Matching refs:phy
67 arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy,
74 *phy = (addr >> 6) & 0x7;
92 uint16_t phy, reg;
94 arswitch_split_setpage(dev, addr, &phy, ®);
95 return (MDIO_READREG(device_get_parent(dev), 0x10 | phy, reg));
104 uint16_t phy, reg;
106 arswitch_split_setpage(dev, addr, &phy, ®);
107 return (MDIO_WRITEREG(device_get_parent(dev), 0x10 | phy, reg, data));
120 arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr,
123 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
125 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
130 arswitch_writemmd(device_t dev, int phy, uint16_t dbg_addr,
133 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
135 (void) MDIO_WRITEREG(device_get_parent(dev), phy,
140 arswitch_reg_read32(device_t dev, int phy, int reg)
143 lo = MDIO_READREG(device_get_parent(dev), phy, reg);
144 hi = MDIO_READREG(device_get_parent(dev), phy, reg + 1);
150 arswitch_reg_write32(device_t dev, int phy, int reg, uint32_t value)
162 phy, reg, lo);
164 phy, reg + 1, hi);
167 phy, reg + 1, hi);
169 phy, reg, lo);
178 uint16_t phy, reg;
180 arswitch_split_setpage(dev, addr, &phy, ®);
181 return arswitch_reg_read32(dev, 0x10 | phy, reg);
188 uint16_t phy, reg;
192 arswitch_split_setpage(dev, addr, &phy, ®);
193 return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
235 uint16_t phy, reg;
240 arswitch_split_setpage(dev, addr, &phy, ®);
242 value = arswitch_reg_read32(dev, 0x10 | phy, reg);
245 return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
253 uint16_t phy, reg;
257 arswitch_split_setpage(dev, addr, &phy, ®);
261 v = arswitch_reg_read32(dev, 0x10 | phy, reg);