Lines Matching refs:nvm
48 struct e1000_nvm_info *nvm = &hw->nvm;
52 nvm->ops.init_params = e1000_null_ops_generic;
53 nvm->ops.acquire = e1000_null_ops_generic;
54 nvm->ops.read = e1000_null_read_nvm;
55 nvm->ops.release = e1000_null_nvm_generic;
56 nvm->ops.reload = e1000_reload_nvm_generic;
57 nvm->ops.update = e1000_null_ops_generic;
58 nvm->ops.valid_led_default = e1000_null_led_default;
59 nvm->ops.validate = e1000_null_ops_generic;
60 nvm->ops.write = e1000_null_write_nvm;
120 usec_delay(hw->nvm.delay_usec);
135 usec_delay(hw->nvm.delay_usec);
150 struct e1000_nvm_info *nvm = &hw->nvm;
157 if (nvm->type == e1000_nvm_eeprom_microwire)
160 if (nvm->type == e1000_nvm_eeprom_spi)
172 usec_delay(nvm->delay_usec);
298 struct e1000_nvm_info *nvm = &hw->nvm;
303 if (nvm->type == e1000_nvm_eeprom_microwire) {
307 usec_delay(nvm->delay_usec);
315 usec_delay(nvm->delay_usec);
318 } else if (nvm->type == e1000_nvm_eeprom_spi) {
323 usec_delay(nvm->delay_usec);
327 usec_delay(nvm->delay_usec);
344 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
348 } else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
384 struct e1000_nvm_info *nvm = &hw->nvm;
390 if (nvm->type == e1000_nvm_eeprom_microwire) {
397 } else if (nvm->type == e1000_nvm_eeprom_spi) {
413 hw->nvm.opcode_bits);
443 struct e1000_nvm_info *nvm = &hw->nvm;
454 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
456 DEBUGOUT("nvm parameter(s) out of bounds\n");
460 ret_val = nvm->ops.acquire(hw);
470 if ((nvm->address_bits == 8) && (offset >= 128))
474 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
475 e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
487 nvm->ops.release(hw);
504 struct e1000_nvm_info *nvm = &hw->nvm;
514 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
516 DEBUGOUT("nvm parameter(s) out of bounds\n");
520 ret_val = nvm->ops.acquire(hw);
530 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
532 nvm->address_bits);
542 nvm->ops.release(hw);
558 struct e1000_nvm_info *nvm = &hw->nvm;
567 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
569 DEBUGOUT("nvm parameter(s) out of bounds\n");
606 struct e1000_nvm_info *nvm = &hw->nvm;
615 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
617 DEBUGOUT("nvm parameter(s) out of bounds\n");
624 ret_val = nvm->ops.acquire(hw);
630 nvm->ops.release(hw);
638 nvm->opcode_bits);
645 if ((nvm->address_bits == 8) && (offset >= 128))
649 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
651 nvm->address_bits);
660 if ((((offset + widx) * 2) % nvm->page_size) == 0) {
666 nvm->ops.release(hw);
687 struct e1000_nvm_info *nvm = &hw->nvm;
698 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
700 DEBUGOUT("nvm parameter(s) out of bounds\n");
704 ret_val = nvm->ops.acquire(hw);
713 (u16)(nvm->opcode_bits + 2));
715 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
721 nvm->opcode_bits);
724 nvm->address_bits);
749 (u16)(nvm->opcode_bits + 2));
751 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
754 nvm->ops.release(hw);
790 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
796 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
841 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
862 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
897 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
903 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
915 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
1168 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1201 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1209 ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);