Lines Matching refs:last_seq
133 uint64_t seq, last_seq, last_emitted;
140 * process needs to update the last_seq btw the atomic read and
146 * polling process and the other process that xchg the last_seq
155 * have temporarly set the last_seq not to the true real last
158 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
162 seq |= last_seq & 0xffffffff00000000LL;
163 if (seq < last_seq) {
168 if (seq <= last_seq || seq > last_emitted) {
176 last_seq = seq;
185 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
223 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
228 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
284 while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
299 seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
355 if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
644 seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
646 /* nothing to wait for, last_seq is
731 - atomic64_read(&rdev->fence_drv[ring].last_seq);
837 radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring);
863 atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
962 (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq));